seanadams;199637 Wrote: 
> i2s eliminates one weakness of s/pdif, the biphase clock recovery, but
> that is not the only source of jitter. Unless you get the clock very
> close to the DAC, and without going through a cable and connectors, it
> is not going to be a huge overall improvement. Why don't you put the
> oscillator in the DAC, and use a word clock to sync the SB?

I am doing this in the DAC I'm currently designing, the Formula One.

You are correct, there are many sources of jitter.  However, believe
me, this is actually is a huge improvement in jitter reduction, even
with the external I2S bus.  My I2S bus has extremely low jitter and the
number of buffers between the master clock and the D/A chip is minimized
in my I2S DAC's.  This is the way that the S/PDIF bus should have been
designed in the first place, with the master clock at the D/A chip. 
Read this review of my external I2S bus driving a Benchmark DAC-1 with
I2S interface:

http://www.6moons.com/audioreviews/empirical/offramp.html

Steve N.
Empirical Audio


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