seanadams;253967 Wrote: > OK... well if that is the case then it points to an interaction with one > of the open bugs I am working on. It may be solved already for the new > firmware that is in the works, but I will do some more testing and see > if I can find an explanation. I still do not see any problem here, but > some of these have been hard to reproduce.
So, please notify when it's fixed and I will test it. I am not a regular visitor at this forum. seanadams;253967 Wrote: > If anywhere in my reasoning you have found a mistake, please point it > out and we can discuss. Otherwise it's pretty silly to just not believe > me because my conclusions conflict with what the high priced stereo > vendors have told you. I am not looking for mistakes - I want to know what you are talking about in order to understand your logic and inference to make up my mind. Why shouldn't I believe you? On the other hand - this is practical engineering and it may happen that other designers also know what they are doing and may be they were able to design a PLL or other clock circuit that works? -- Which concludes my posts on this subject. Rgds. -- achri-d ------------------------------------------------------------------------ achri-d's Profile: http://forums.slimdevices.com/member.php?userid=10325 View this thread: http://forums.slimdevices.com/showthread.php?t=39770 _______________________________________________ audiophiles mailing list [email protected] http://lists.slimdevices.com/lists/listinfo/audiophiles
