John,

Thank you for your thoughts. 

Just one point I wanted to pick up on - the Naim DAC approach - where
the data input data is written into a large ring buffer using the
derived jittered clock, then read out using a stable local clock -
wouldn't this  eliminate interface jitter for an asynchronous link? 

Running the local clock at the very long run average frequency of the
input jittered clock and having the capacity to hold many seconds worth
of data in RAM would allow link jitter to be effectively eliminated.  As
you point out, this doesn't stop the DAC introducing jitter of its own.

Andy.


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Andy8421
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