Vincent Trouilliez <[email protected]> wrote: > I can only debug one at a time, but while debugging one, can I leave > the other one in the chain, or will that upset the debugger and I > need to plug the JTAG header to each target individually ?
Yes, sure. The limitation is only that the JTAG ICE is the JTAG master, and there can only be one master in the chain. Since each JTAG ICE (or AVR Dragon, for that matter) can only talk to one AVR at a time, it can only debug one. The other one is simply acting as a shift register, passing the other device's JTAG commands through, without being addressed by them. Just remember, while for plain JTAG programming, you can drive the JTAG clock as fast as possible (subject of the limitations of the passive circuitry around, see David Kelly's cable length issues), for debugging, you have to obey the fCPU/4 rule again for the JTAG clock. -- cheers, J"org .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-) _______________________________________________ AVR-chat mailing list [email protected] http://lists.nongnu.org/mailman/listinfo/avr-chat
