> Most of this patch has to do with using the "adjust_len" attribute and would
> be better off in the adjust_len patch:

Yes, I did this:
> > BTW: How can I generate a patch against the mentioned 
> > "adjust_len insn attribute"?. I think that would be more handy?

because I found no way to do the diff against the first patch.

I can generate (SVN+P1)-SVN (the adjust_len patch) and
(SVN+P1+P2)-SVN (the first patch for 27663), but I cannot generate
(SVN+P1+P2)-(SVN+P1), i.e. generate a patch P2 atop of SVN+P1 without removing 
all of
P1. 
So it is not possible so split a complex patch into some logical parts that 
built on each other?

I removed all of P1 and attatched the proposed solution to #27663 again.

> This line should not be removed:
> 
> @@ -1,4 +1,3 @@
> -;; -*- Mode: Scheme -*-

Sorry for including that in the patch. This line is very annoying and I am 
removin it in my working copy
and missed to rewrite it again.

First, IMHO advising an editor should not be done from within the compiler 
sources by foo-editor magic, should it?
Maybe someone else wants to tune his/her vi, jedit, Code::Blocks, TextPad, 
MicroSoft-Word by avr.md ;-)
Compiler sources should not bother with the editor they may be browsed with.

Second, it's annoying because it turns on scheme mode in emacs automatically 
and 
knocks out the preferred mode in .emacs configuration. I e.g. prefer md-mode 
for md-files .

Third, anyone who wants to make emacs use scheme when visiting .md can advise 
emacs in his/her .emacs:

(setq auto-mode-alist
      (cons '("\\.md$" . scheme-mode)
            auto-mode-alist))

This solution will also open other md-files in scheme-mode, even without emacs 
magic in every 
md-file that can be found in gcc sources....

Regards, Georg-Johann


Index: avr.md
===================================================================
--- avr.md	(revision 143753)
+++ avr.md	(working copy)
@@ -3262,3 +3262,61 @@
     expand_epilogue (); 
     DONE;
   }")
+
+
+
+;; Fix for #27663
+;; http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27663
+(define_insn_and_split "*iorsi3_ashiftsi_zeroxqisi"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+        (ior:SI (ashift:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
+                           (match_operand:QI 2 "const_int_operand" "O"))
+                (match_operand:SI 3 "register_operand" "0")))]
+  "satisfies_constraint_O(operands[2])"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 4)
+        (ior:QI (match_dup 5)
+                (match_dup 1)))]
+  {
+        operands[4] = simplify_gen_subreg (QImode, operands[0], SImode, INTVAL(operands[2]) >> 3);
+        operands[5] = simplify_gen_subreg (QImode, operands[3], SImode, INTVAL(operands[2]) >> 3);
+  })
+
+;; #27663
+;; same as above for offset 0, i.e. no shift needed
+(define_insn_and_split "*iorsi3_zeroxqisi"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+        (ior:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
+                (match_operand:SI 2 "register_operand" "0")))]
+  "1"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 3)
+        (ior:QI (match_dup 4)
+                (match_dup 1)))]
+  {
+        operands[3] = simplify_gen_subreg (QImode, operands[0], SImode, 0);
+        operands[4] = simplify_gen_subreg (QImode, operands[2], SImode, 0);
+  })
+
+;; #27663
+;; same as "*iorsi3_ashiftsi_zeroxqisi" without IOR
+(define_insn_and_split "*ashiftsi_zeroxqisi"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+        (ashift:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
+                   (match_operand:QI 2 "const_int_operand" "O")))]
+  "satisfies_constraint_O(operands[2])"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 3)   (match_dup 1))
+   (set (match_dup 4)   (const_int 0))
+   (set (match_dup 5)   (const_int 0))
+   (set (match_dup 6)   (const_int 0))]
+   {
+        int off = INTVAL (operands[2]) >> 3;
+        operands[3] = simplify_gen_subreg (QImode, operands[0], SImode, off);
+        operands[4] = simplify_gen_subreg (QImode, operands[0], SImode, (off+1) % 4);
+        operands[5] = simplify_gen_subreg (QImode, operands[0], SImode, (off+2) % 4);
+        operands[6] = simplify_gen_subreg (QImode, operands[0], SImode, (off+3) % 4);
+  })

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