Hi,
if I am not deluded by my memory, r1 permanently holds 0. Actually clr
r1 is redundant.
István
2010-08-12 18:13 keltezéssel, Johannes Bauer írta:
Hello group,
I think I may have found a bug in the avr-gcc compiler. The created
prologue looks like this with avr-gcc 4.3.4 and a XMega128A1 target:
000057b6 <__vector_83>:
57b6: 1f 92 push r1
57b8: 0f 92 push r0
57ba: 0f b6 in r0, 0x3f ; 63
57bc: 0f 92 push r0
57be: 08 b6 in r0, 0x38 ; 56
57c0: 0f 92 push r0
57c2: 18 be out 0x38, r1 ; 56
57c4: 09 b6 in r0, 0x39 ; 57
57c6: 0f 92 push r0
57c8: 19 be out 0x39, r1 ; 57
57ca: 0b b6 in r0, 0x3b ; 59
57cc: 0f 92 push r0
57ce: 1b be out 0x3b, r1 ; 59
57d0: 11 24 eor r1, r1
This appears to be strange to me. The "clr r1" instruction should IMO
be placed after the first "push r0" instruction. Otherwise, the
RAMPD/X/Z registers may be initialized with random crap instead of 0
as they should be.
Kind regards,
Johannes
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