Just from a purely AVR architecture point of view, the AVR_HAVE_RAMPD #define indicates that the AVR chip in question supports the "RAMP" paging register, described as follows:

   Register concatenated with the Z-register enabling direct addressing of the whole data space on MCUs
   with more than 64KB data space.

Eventually the originally tiny AVR chips' addressable memory got so big that we needed a "paging" register.  (That's a repeating theme with every 8-bit/16-bit microcontroller family.)

So the "RAMPD" register needs to be saved along with the X, Y and Z "special function" registers, if it is present.

Best regards,


On 12/16/2021 3:46 PM, Ian Molton wrote:
Browsing the GCC source, I found this in gcc/config/avr/avr.c

           && TEST_HARD_REG_BIT (set, REG_Z)
           && TEST_HARD_REG_BIT (set, REG_Z + 1))
           emit_push_sfr (rampz_rtx, false /* frame */, AVR_HAVE_RAMPD,

I wont pretend to fully understand this part of the compiler, but that
AVR_HAVE_RAMPD looks shady to me?

Anyone with deeper knowledge want to have a look?


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