> * The XMEGA is realized.
> At this moment the XMEGA is not tested.
I do not understand this code in eewr_byte.S.
The 'read' command is being issued to the XMega NVM
in the write function? Don't all XMega EEPROM writes have to be
done via the page buffer?
ENTRY eeprom_write_byte
mov r18, r22
ENTRY eeprom_write_r18
#if __AVR_XMEGA__ /* -------------------------------------------- */
# ifndef CCP_IOREG_gc
# define CCP_IOREG_gc 0xD8 /* IO Register Protection */
# endif
# ifndef NVM_CMD_READ_EEPROM_gc
# define NVM_CMD_READ_EEPROM_gc 0x06
# endif
; Prepare base address of NVM.
ldi ZL, lo8(NVM_BASE)
ldi ZH, hi8(NVM_BASE)
; Wait until NVM is not busy.
1: ldd r19, Z + NVM_STATUS - NVM_BASE
sbrc r19, NVM_NVMBUSY_bp
rjmp 1b
; Desable EEPROM mapping into data space.
ldd r19, Z + NVM_CTRLB - NVM_BASE
andi r19, ~NVM_EEMAPEN_bm
std Z + NVM_CTRLB - NVM_BASE, XL
; Set address and data to write to.
std Z + NVM_ADDR0 - NVM_BASE, addr_lo
std Z + NVM_ADDR1 - NVM_BASE, addr_hi
std Z + NVM_ADDR2 - NVM_BASE, __zero_reg__
std Z + NVM_DATA0 - NVM_BASE, r18
; Issue EEPROM read command.
ldi r18, NVM_CMD_READ_EEPROM_gc
std Z + NVM_CMD - NVM_BASE, r18
ldi r18, CCP_IOREG_gc
ldi r19, NVM_CMDEX_bm
out CCP, r18
std Z + NVM_CTRLA - NVM_BASE, r19
; Increment address.
adiw addr_lo, 1
ret
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