As Weddington, Eric wrote: > > Instructions such as sts that use two words (32 bits) are not > > guaranteed to be executed before an interrupt may fire.
> Have you tested this on the ATmega1281? This behaviour would surprise me a bit, given that the datasheet chapter about interrupt latency explicitly mentions the increased latency when the interrupt arrives while a multiword instruction is currently being executed. I'd be interested in setting up a test setup that experimentally verifies this behaviour, as the assumption the next instruction will still be executed without being interrupted is quite crucial to the toolchain. -- cheers, J"org .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-) _______________________________________________ AVR-libc-dev mailing list AVR-libc-dev@nongnu.org http://lists.nongnu.org/mailman/listinfo/avr-libc-dev
