Hi Anitha, > 1. What purpose do GPIO and CPU definitions serve?
As far as I understand (disclaimer: I didn't do much with Xmegas so far), they are just IO register blocks as any other IO register block in the Xmega. If you look into the Xmega A datasheet, chapter 3 (AVR CPU), there is a section "Register Summary" at the end of that chapter, describing the IO registers that belong to the CPU block (SREG, stack pointer etc.). Likewise, the GPIO register block is described in section 4.18. GPIO registers are not tied to any hardware pin, their sole purpose is that they are available to the CPU with faster instructions (IN, OUT, CBI, SBI) than generic memory access (LD, ST) so they could be (ab)used as fast "bit memory". (I'm not sure whether you could possibly include them into the Xmega event system.) -- cheers, J"org .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-) _______________________________________________ AVR-libc-dev mailing list AVR-libc-dev@nongnu.org http://lists.nongnu.org/mailman/listinfo/avr-libc-dev
