Hi Anitha, Actually, this is the way to solve this bug:
- Remove the definitions that have CPU_t and GPIO_t from all xmega header files (iox*.h) - Fix the avrgcc-header script that converts the XML device file (from AVR Studio) to the header file to no longer generate those definitions with the missing structures for future xmega header files. A sample header file for IAR is attached, and you'll see that they also do not include the CPU_t and GPIO_t structures. That way our headers will be more like the ones that IAR uses. Which is good because both come from Atmel. Eric Weddington > -----Original Message----- > From: > avr-libc-dev-bounces+eric.weddington=atmel....@nongnu.org > [mailto:avr-libc-dev-bounces+eric.weddington=atmel....@nongnu. > org] On Behalf Of Boyapati, Anitha > Sent: Monday, March 29, 2010 8:18 AM > To: avr-libc-dev@nongnu.org > Subject: [avr-libc-dev] #bug 28901 XMega header files with > missingdefinitions for gpio_t and cpu_t > > > > Hello, > > Following is a tentative fix for #bug 28901. I have modified > it for one file iox128a1.h. Would like to carry out similar > changes to remaining xmega headers if the fix looks fine. I > had to introduce a suffix '_r' so as not to collide with > similar macros defined. Let me know your comments. > > > Index: iox128a1.h > =================================================================== > --- iox128a1.h (revision 2103) > +++ iox128a1.h (working copy) > @@ -147,22 +147,55 @@ > CCP_IOREG_gc = (0xD8<<0), /* IO Register Protection */ > } CCP_t; > > +/* > +------------------------------------------------------------- > ------------- > +GPIO - General Purpose IO Registers > +------------------------------------------------------------- > ------------- > +*/ > +typedef struct GPIO_struct > +{ > > + register8_t GPIO0_r; /* General Purpose Register 0 */ > + register8_t GPIO1_r; /* General Purpose Register 1 */ > + register8_t GPIO2_r; /* General Purpose Register 2 */ > + register8_t GPIO3_r; /* General Purpose Register 3 */ > + register8_t GPIO4_r; /* General Purpose Register 4 */ > + register8_t GPIO5_r; /* General Purpose Register 5 */ > + register8_t GPIO6_r; /* General Purpose Register 6 */ > + register8_t GPIO7_r; /* General Purpose Register 7 */ > + register8_t GPIO8_r; /* General Purpose Register 8 */ > + register8_t GPIO9_r; /* General Purpose Register 9 */ > + register8_t GPIOA_r; /* General Purpose Register A */ > + register8_t GPIOB_r; /* General Purpose Register B */ > + register8_t GPIOC_r; /* General Purpose Register C */ > + register8_t GPIOD_r; /* General Purpose Register D */ > + register8_t GPIOE_r; /* General Purpose Register E */ > + register8_t GPIOF_r; /* General Purpose Register F */ > + > +} GPIO_t; > + > + > /* > > -------------------------------------------------------------- > ------------ > +CPU - AVR RISC CPU > > -------------------------------------------------------------- > ------------ > */ > > +/* AVR CPU */ > +typedef struct CPU_struct > { > + register8_t CCP_r; /* Configuration Change Protection > Register */ > + register8_t RAMPD_r; /* Extended Direct Addressing Register */ > + register8_t RAMPX_r; /* Extended X-Pointer Register */ > + register8_t RAMPY_r; /* Extended Y-Pointer Register */ > + register8_t RAMPZ_r; /* Extended Z-Pointer Register */ > + register8_t EIND_r; /* Extended Indirect Register */ > + register8_t SPL_r; /* Stack Pointer Register low */ > + register8_t SPH_r; /* Stack Pointer Register high */ > + register8_t SREG_r; /* Status Register */ > > +} CPU_t; > + > /* > > -------------------------------------------------------------- > ------------ > CLK - Clock System > > > Thanks > Anitha > > > _______________________________________________ > AVR-libc-dev mailing list > AVR-libc-dev@nongnu.org > http://lists.nongnu.org/mailman/listinfo/avr-libc-dev > _______________________________________________ AVR-libc-dev mailing list AVR-libc-dev@nongnu.org http://lists.nongnu.org/mailman/listinfo/avr-libc-dev
