As Anton Voloshin wrote: > My bad. LDI takes 1 cycle, and it's not even here. The reason is that OUT > instruction enables interrupts here, and interrupt can occure before the > second STS instruction.
On tiny/mega AVRs, re-enabling interrupts is always delayed by one instruction, that is, the STS instruction right after the OUT is still executed with interrupts disabled. This has been the way all the time, and GCC relies on this in the function epilogue as well. (On Xmega AVRs, this has been changed in hardware, so GCC emit a different epilogue there. However, the Xmega watchdog handling is different anyway.) Curious, are you experiencing this on real hardware, or are you using a simulator? -- cheers, J"org .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-) _______________________________________________ AVR-libc-dev mailing list AVR-libc-dev@nongnu.org https://lists.nongnu.org/mailman/listinfo/avr-libc-dev
