As Brian Dean wrote: > Yes - I just verified your fix, works great now. Excellent!
Great! I just committed the doc updates for the JTAG ICE mkI support. Page-mode (i.e. -U) programming the EEPROM through JTAG requires a prior chip erase (with the EESAVE fuse unprogrammed), this is a documented feature of the way JTAG EEPROM programming works. (According to Atmel, it inherits the parallel programming interface with all its features.) Byte-mode programming (i.e. from terminal mode) the ROM would require page cacheing, and page updating, as the ROM cannot be really written one byte at a time through JTAG. This is neither implemented for the mkI nor for the mkII JTAG ICE, and unless someone requests that feature, I don't plan to add it at this time. So the only remaining issue is that the JTAG ICE mkI currently cannot perform byte-mode EEPROM updates. This is supposed to be possible, but doesn't work for the mkI ICE in AVaRICE either (though it does work for the mkII, i.e. it's not a problem with the JTAG access itself). I ran out of ideas on this, and asked Atmel Norway for help. -- cheers, J"org .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-) _______________________________________________ avrdude-dev mailing list [email protected] http://lists.nongnu.org/mailman/listinfo/avrdude-dev
