W dniu 14 sierpnia 2011 11:24 użytkownik Rafał Miłecki
<zaj...@gmail.com> napisał:
> W dniu 14 sierpnia 2011 11:07 użytkownik Rafał Miłecki
> <zaj...@gmail.com> napisał:
>> I guess we should just increase RX ring size instead hacking
>> (stripping) 0x1000 bit. We just need to check  on which hardware wl
>> uses 256 ring size.
>
> Ignore that. I just got 8 KiB aligned ring when testing 256 ring size.
>
> I agree with David, that 0x1000 comes from ring address. Depending on
> address alignment it's 0 or 1.

The question I now have is:

1) Should be keep using 4 KiB aligned rings (sometimes, depending on
the luck, 8 KiB) with ignoring 0x1000 bit
2) Switch to 8 KiB aligned rings

Broadcom seems to use second method, it never uses just 4 KiB aligned ring.

From dmb's log:
write32 0xb0600228 <- 0x00098000
write32 0xb060022c <- 0x80000000
0x0000000000098000

From dwmw2's log:
write32 0xb0600228 <- 0x1f88a000
write32 0xb060022c <- 0x80000000
0x000000001f88a000

From kitelau's log:
write32 0xa0600228 <- 0x00098000
write32 0xa060022c <- 0x80000000
0x0000000000098000

All are 8 KiB aligned. David also dropped following comment from brcm80211:
> Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB 
> physical address.

-- 
Rafał

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