Michael, Based on BCM440X Programmer's Reference Guide that may or may not apply to DMA processor used in WLAN chipsets, B43_DMA32_RXSTATUS may be updated by hardware to point to the same descriptor as B43_DMA32_RXINDEX.
For DMA processor this means that no more free descriptors are available. However b43_dma_rx assumes no data needs to be processed (see how ring->current_slot is updated and used in loop condition on next interrupt). This could explain stalls. I don't expect that changing loop condition is sufficient, as without dropping some packets we will not prevent FIFO overruns. Regards, Piotr On Sun, Apr 21, 2013 at 7:38 AM, Michael Büsch <m...@bues.ch> wrote: > On Sat, 20 Apr 2013 23:23:54 +0200 (CEST) > Thommy Jakobsson <thom...@gmail.com> wrote: > >> Isn't that exactly what we do in b43_dma_rx? The initial rx descriptor >> index is just to make the device to start. Theoretically you could get >> into a fault situation if the device succeds in using up all descriptors >> between b43_dma_rx_discard (added by my patch) and the call to b43_dma_rx. >> Because then you could start reading the same packet as the device is >> writing to. > > Yes this is true. > And thus I'm currently unsure why we need this patch at all. > _Why_ does the DMA stall as soon as the ring is filled up? > > -- > Michael _______________________________________________ b43-dev mailing list b43-dev@lists.infradead.org http://lists.infradead.org/mailman/listinfo/b43-dev
