From: Andrew Morton <[EMAIL PROTECTED]>
Align "case" with "switch"
Cc: Aurelien Jarno <[EMAIL PROTECTED]>
Cc: Felix Fietkau <[EMAIL PROTECTED]>
Cc: Michael Buesch <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
Index: wireless-dev/drivers/ssb/driver_chipcommon.c
===================================================================
--- wireless-dev.orig/drivers/ssb/driver_chipcommon.c 2007-08-02
17:18:37.000000000 +0200
+++ wireless-dev/drivers/ssb/driver_chipcommon.c 2007-08-02
17:18:46.000000000 +0200
@@ -263,19 +263,19 @@ void ssb_chipco_get_clockcpu(struct ssb_
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
- case SSB_PLLTYPE_2:
- case SSB_PLLTYPE_4:
- case SSB_PLLTYPE_6:
- case SSB_PLLTYPE_7:
- *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_MIPS);
- break;
- case SSB_PLLTYPE_3:
- /* 5350 uses m2 to control mips */
- *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_M2);
- break;
- default:
- *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_SB);
- break;
+ case SSB_PLLTYPE_2:
+ case SSB_PLLTYPE_4:
+ case SSB_PLLTYPE_6:
+ case SSB_PLLTYPE_7:
+ *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_MIPS);
+ break;
+ case SSB_PLLTYPE_3:
+ /* 5350 uses m2 to control mips */
+ *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_M2);
+ break;
+ default:
+ *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_SB);
+ break;
}
}
--
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