Hey, I wanted to know some things about the those pesky external conditions and thought I could look at the old ucode because that, as you may remember, uses four RCM matchers for finding crypto keys and I thought it may be easy to identify that. Since I don't have any rev4 or lower hardware, I simply matched the instructions in rev5 with those in rev4 and found all instructions that show up in the rev2 and rev4 microcodes I have.
I'll be publishing my findings in the specs soon, the instruction format
is somewhat more spaced out, you have for example the lowest 6 bits
unused unless it's an external condition jump etc.
The revision 2 microcode I have is just over 2k instructions while the
revision 5 microcode with QoS and hardware crypto is about 2.8k, maybe
the difference helps :)
Larry, are you interested in crypto offload fpr rev4 cores? Revision 2
cores don't support crypto at all, but rev4 do and now that I'm able to
peek into the microcode I should be able to describe how it works.
Below is the instruction set reference I'll upload to the specs.
johannes
--
Instruction set reference for the revision 4 and lower Microcode.
[hex numbers have no placeholders but zeroes instead]
hex | binary | meaning
00000 000000 0000 010c cccccc jump on condition c false
00000 000000 0000 001c cccccc jump on condition c true
newer microcode seems to have 8 bit conditions?
the new microcode might have different
condition numbers as well
00400 000000 0001 0000 000000 nap
00800 000000 0010 0000 000000 call
00c00 000000 0011 0000 000000 ret
20200 001000 0000 1000 000000 add
20240 001000 0000 1001 000000 add + carry
20280 001000 0000 1010 000000 add [set carry]
202c0 001000 0000 1011 000000 add + carry [set carry]
20000 001000 0000 0000 000000 and
20040 001000 0000 0001 000000 and ~
20080 001000 0000 0010 000000 or
200c0 001000 0000 0011 000000 xor
20300 001000 0001 1000 000000 sub
20340 001000 0001 1001 000000 sub + carry
20380 001000 0001 1010 000000 sub [set carry]
203c0 001000 0001 1011 000000 sub + carry [set carry]
20400 001000 0001 0000 000000 left shift
20440 001000 0001 0001 000000 ? (unused)
20480 001000 0001 0010 000000 right shift (unsigned)
204c0 001000 0001 0011 000000 ? (unused)
20500 001000 0001 0100 000000 left rotate
20540 001000 0001 0101 000000 ? (unused)
20580 001000 0001 0110 000000 right rotate
205c0 001000 0001 0111 000000 ? (unused)
28000 001010 mmmm ssss 000000 shift right over two registers
(cf. "2MS" instruction in new ucode)
2c000 001011 mmmm ssss 000000 or with shift and select
(cf. "3MS" instruction in new ucode)
30000 001100 0000 0000 000000 jump if (x & y)
30001 001100 0000 0000 000001 jump if not (x & y)
30040 001100 0000 0001 000000 jump if ((x & y) == 0)
30041 001100 0000 0001 000001 jump if ((x & y) != 0)
30300 001100 0000 1100 000000 jump equal
30301 001100 0000 1100 000001 jump not equal
30302 001100 0000 1100 000010 jump less (unsigned)
30303 001100 0000 1100 000011 jump not less (unsigned)
30304 001100 0000 1100 000100 jump more (unsigned)
30305 001100 0000 1100 000101 jump not more (unsigned)
30306 001100 0000 1100 000110 ? (unused)
30307 001100 0000 1100 000111 ? (unused)
30308 001100 0000 1100 001000 ? (unused)
30309 001100 0000 1100 001001 ? (unused)
3030a 001100 0000 1100 001010 jump less (signed)
3030b 001100 0000 1100 001011 jump not less (signed)
3030c 001100 0000 1100 001100 jump more (signed)
3030d 001100 0000 1100 001101 jump not more (signed)
3030e 001100 0000 1100 001110 ? (unused)
3030f 001100 0000 1100 001111 ? (unused)
38000 001110 mmmm ssss 000000 jump if zero after shift and mask
jump if ((((yyy << 16 | xxx) >> s) &
(1<<(m+1)-1)) == 0)
38001 001110 mmmm ssss 000001 jump if nonzero after shift and mask
jump if ((((yyy << 16 | xxx) >> s) &
(1<<(m+1)-1)) != 0)
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