On Wednesday 21 November 2007 22:38:12 Larry Finger wrote:
> The BCM94311MCG rev 02 chip has an 802.11 core with revision 13 and
> has not been supported until now. The changes include the following:
>
> (1) Add the 802.11 rev 13 device to the ssb_device_id table to load b43.
> (2) Add PHY revision 9 to the supported list.
> (3) Fix 64-bit addressing errors.
> (4) Remove some magic numbers in the DMA setup.
>
> The DMA implementation for this chip supports full 64-bit addressing with
> one exception. Whenever the Descriptor Ring Buffer is in high memory, a
> fatal DMA error occurs. This problem was not present in 2.6.24-rc2 due
> to code to "Bias the placement of kernel pages at lower PFNs". When
> commit 44048d70 reverted that code, the DMA error appeared. As a "fix",
> use the GFP_DMA flag when allocating the buffer for 64-bit DMA. At present,
> this problem is thought to arise from a hardware error.
>
> This patch has been tested on my system and by Cédric Caumont
> <[EMAIL PROTECTED]>.
>
> Signed-off-by: Larry Finger <[EMAIL PROTECTED]>
> ---
>
> John,
>
> This patch is intended for the everything branch of wireless-2.6.
>
> Larry
> ---
>
> dma.c | 50 ++++++++++++++++++++++++++------------------------
> main.c | 3 ++-
> wa.c | 1 +
> 3 files changed, 29 insertions(+), 25 deletions(-)
>
> Index: wireless-2.6/drivers/net/wireless/b43/dma.c
> ===================================================================
> --- wireless-2.6.orig/drivers/net/wireless/b43/dma.c
> +++ wireless-2.6/drivers/net/wireless/b43/dma.c
> @@ -165,7 +165,7 @@ static void op64_fill_descriptor(struct
> addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
> addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
> >> SSB_DMA_TRANSLATION_SHIFT;
> - addrhi |= ssb_dma_translation(ring->dev->dev);
> + addrhi |= (ssb_dma_translation(ring->dev->dev) << 1);
> if (slot == ring->nr_slots - 1)
> ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
> if (start)
> @@ -426,9 +426,21 @@ static inline
> static int alloc_ringmemory(struct b43_dmaring *ring)
> {
> struct device *dev = ring->dev->dev->dev;
> + gfp_t flags = GFP_KERNEL;
>
> + /* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
> + * alignment and 8K buffers for 64-bit DMA with 8K alignment. Testing
> + * has shown that 4K is sufficient for the latter as long as the buffer
> + * does not cross an 8K boundary.
> + *
> + * For unknown reasons - possibly a hardware error - the BCM4311 rev
> + * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
> + * which accounts for the GFP_DMA flag below.
> + */
> + if (ring->dma64)
> + flags = GFP_DMA;
> ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,
> - &(ring->dmabase), GFP_KERNEL);
> + &(ring->dmabase), flags);
> if (!ring->descbase) {
> b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
> return -ENOMEM;
> @@ -483,7 +495,7 @@ int b43_dmacontroller_rx_reset(struct b4
> return 0;
> }
>
> -/* Reset the RX DMA channel */
> +/* Reset the TX DMA channel */
> int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int
> dma64)
> {
> int i;
> @@ -636,18 +648,12 @@ static int dmacontroller_setup(struct b4
> if (ring->dma64) {
> u64 ringbase = (u64) (ring->dmabase);
>
> - addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
> - >> SSB_DMA_TRANSLATION_SHIFT;
> - value = B43_DMA64_TXENABLE;
> - value |= (addrext << B43_DMA64_TXADDREXT_SHIFT)
> - & B43_DMA64_TXADDREXT_MASK;
> - b43_dma_write(ring, B43_DMA64_TXCTL, value);
> + b43_dma_write(ring, B43_DMA64_TXCTL,
> + B43_DMA64_TXENABLE);
> b43_dma_write(ring, B43_DMA64_TXRINGLO,
> (ringbase & 0xFFFFFFFF));
> b43_dma_write(ring, B43_DMA64_TXRINGHI,
> - ((ringbase >> 32) &
> - ~SSB_DMA_TRANSLATION_MASK)
> - | trans);
> + (ringbase >> 32));
> } else {
> u32 ringbase = (u32) (ring->dmabase);
>
> @@ -668,20 +674,15 @@ static int dmacontroller_setup(struct b4
> if (ring->dma64) {
> u64 ringbase = (u64) (ring->dmabase);
>
> - addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
> - >> SSB_DMA_TRANSLATION_SHIFT;
> - value = (ring->frameoffset << B43_DMA64_RXFROFF_SHIFT);
> - value |= B43_DMA64_RXENABLE;
> - value |= (addrext << B43_DMA64_RXADDREXT_SHIFT)
> - & B43_DMA64_RXADDREXT_MASK;
> + value = (ring->frameoffset << B43_DMA64_RXFROFF_SHIFT)
> + | B43_DMA64_RXENABLE;
> b43_dma_write(ring, B43_DMA64_RXCTL, value);
> b43_dma_write(ring, B43_DMA64_RXRINGLO,
> (ringbase & 0xFFFFFFFF));
> b43_dma_write(ring, B43_DMA64_RXRINGHI,
> - ((ringbase >> 32) &
> - ~SSB_DMA_TRANSLATION_MASK)
> - | trans);
> - b43_dma_write(ring, B43_DMA64_RXINDEX, 200);
> + (ringbase >> 32));
> + b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
> + sizeof(struct b43_dmadesc64));
> } else {
> u32 ringbase = (u32) (ring->dmabase);
>
> @@ -695,11 +696,12 @@ static int dmacontroller_setup(struct b4
> b43_dma_write(ring, B43_DMA32_RXRING,
> (ringbase & ~SSB_DMA_TRANSLATION_MASK)
> | trans);
> - b43_dma_write(ring, B43_DMA32_RXINDEX, 200);
> + b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots *
> + sizeof(struct b43_dmadesc32));
> }
> }
>
> - out:
> +out:
> return err;
> }
>
> Index: wireless-2.6/drivers/net/wireless/b43/main.c
> ===================================================================
> --- wireless-2.6.orig/drivers/net/wireless/b43/main.c
> +++ wireless-2.6/drivers/net/wireless/b43/main.c
> @@ -93,6 +93,7 @@ static const struct ssb_device_id b43_ss
> SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 7),
> SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9),
> SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),
> + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13),
> SSB_DEVTABLE_END
> };
>
> @@ -3064,7 +3065,7 @@ static int b43_phy_versioning(struct b43
> unsupported = 1;
> break;
> case B43_PHYTYPE_G:
> - if (phy_rev > 8)
> + if (phy_rev > 9)
> unsupported = 1;
> break;
> default:
> Index: wireless-2.6/drivers/net/wireless/b43/wa.c
> ===================================================================
> --- wireless-2.6.orig/drivers/net/wireless/b43/wa.c
> +++ wireless-2.6/drivers/net/wireless/b43/wa.c
> @@ -642,6 +642,7 @@ void b43_wa_all(struct b43_wldev *dev)
> case 6:
> case 7:
> case 8:
> + case 9:
> b43_wa_tr_ltov(dev);
> b43_wa_crs_ed(dev);
> b43_wa_rssi_lt(dev);
>
>
partially acked.
Though, I'm not quite sure yet why you remove that
address extension bits. The specs clearly say that they _are_ there.
And it makes sense to use them, as two bytes of the address are used
for the routing stuff. So the highest 2 bits of the address have to be put
somewhere else. That's the "Transmit Channel Control Word" and
"Receive Channel Control Word" where 0x00030000 are the extension bits.
However I do think that this might be related to the bug you are explaining
in the comment:
> + * For unknown reasons - possibly a hardware error - the BCM4311 rev
> + * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
> + * which accounts for the GFP_DMA flag below.
--
Greetings Michael.
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