On Tuesday 08 April 2008 00:06:00 Larry Finger wrote:
> Michael Buesch wrote:
> > 
> > Can you add a printk here that prints the contents of
> > B43legacy_DMA32_TXSTATUS
> > and post the logs?
> > 
> > This could actually be a bus (ssb) problem. Not sure, yet.
> > Some people do see it on b43, too.
> > 
> 
> ACPI: PCI Interrupt 0000:00:0b.0[A] -> GSI 19 (level, low) -> IRQ 19
> ssb: Core 0 found: IEEE 802.11 (cc 0x812, rev 0x02, vendor 0x4243)
> ssb: Core 1 found: PCMCIA (cc 0x80D, rev 0x00, vendor 0x4243)
> ssb: Core 2 found: Fast Ethernet (cc 0x806, rev 0x02, vendor 0x4243)
> ssb: Core 3 found: V90 (cc 0x807, rev 0x01, vendor 0x4243)
> ssb: Core 4 found: PCI (cc 0x804, rev 0x03, vendor 0x4243)
> ssb: SPROM revision 1 detected.
> ssb: Sonics Silicon Backplane found on PCI device 0000:00:0b.0
> b43legacy-phy0: Broadcom 4301 WLAN found
> b43legacy-phy0 debug: Found PHY: Analog 0, Type 1, Revision 4
> b43legacy-phy0 debug: Found Radio: Manuf 0x17F, Version 0x2053, Revision 2
> b43legacy-phy0 debug: Radio initialized
> phy0: Selected rate control algorithm 'pid'
> Broadcom 43xx-legacy driver loaded [ Features: PID, Firmware-ID: FW10 ]
> udev: renamed network interface wlan0 to eth1
> b43legacy-phy0: Loading firmware version 0x127, patch level 14
> (2005-04-18 02:36:27)
> b43legacy-phy0 debug: Chip initialized
> b43legacy-phy0 debug: 30-bit DMA initialized
> b43legacy-phy0 debug: Wireless interface started
> b43legacy-phy0 debug: Adding Interface type 2
> b43legacy: B43legacy_DMA32_TXSTATUS = 0xC
> b43legacy: B43legacy_DMA32_TXSTATUS = 0xC
> b43legacy: B43legacy_DMA32_TXSTATUS = 0xC

Huh? So the Transmit State is 0 = "Disabled"?
I would have expected 1 "Active" or 2 "Idle Wait".
Weirdo.

> Index: wireless-testing/drivers/ssb/driver_pcicore.c
> ===================================================================
> --- wireless-testing.orig/drivers/ssb/driver_pcicore.c
> +++ wireless-testing/drivers/ssb/driver_pcicore.c
> @@ -569,7 +569,7 @@ int ssb_pcicore_dev_irqvecs_enable(struc
>               } else {
>                       tmp = ssb_read32(dev, SSB_TPSFLAG);
>                       tmp &= SSB_TPSFLAG_BPFLAG;
> -                     intvec |= tmp;
> +                     intvec |= (1 << tmp);
>               }
>               ssb_write32(pdev, SSB_INTVEC, intvec);
>       }

Whoa, what the hell. You seem to be right. It seems this code worked only
by pure coincidence on most devices.
Clearly, this patch needs a lot of testing on lots of devices before it
can go in. But it seems to be a really good catch. ;)

-- 
Greetings Michael.
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