Enable the PCI slow clock workaround, if we're running a PCI core rev <= 10.

Signed-off-by: Michael Buesch <[email protected]>

---

John, this doesn't fix know bugs. Please queue for the next feature release.


Index: wireless-testing/drivers/net/wireless/b43/main.c
===================================================================
--- wireless-testing.orig/drivers/net/wireless/b43/main.c       2009-02-20 
14:41:53.000000000 +0100
+++ wireless-testing/drivers/net/wireless/b43/main.c    2009-02-20 
14:53:23.000000000 +0100
@@ -4187,12 +4187,15 @@ static int b43_wireless_core_init(struct
                        hf |= B43_HF_4318TSSI;
                if (phy->radio_rev < 6)
                        hf |= B43_HF_VCORECALC;
        }
        if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)
                hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */
+       if ((bus->bustype == SSB_BUSTYPE_PCI) &&
+           (bus->pcicore.dev->id.revision <= 10))
+               hf |= B43_HF_PCISCW; /* PCI slow clock workaround. */
        b43_hf_write(dev, hf);
 
        b43_set_retry_limits(dev, B43_DEFAULT_SHORT_RETRY_LIMIT,
                             B43_DEFAULT_LONG_RETRY_LIMIT);
        b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SFFBLIM, 3);
        b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_LFFBLIM, 2);

-- 
Greetings, Michael.
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