Michael,
As you may recall, I dumped writes to the PCI config space for both
b43 and the wl driver. I found that wl wrote to address 0x40. In
looking around other drivers, I found the following fragment in ipw2100:
/* We disable the RETRY_TIMEOUT register (0x41) to keep
* PCI Tx retries from interfering with C3 CPU state */
pci_read_config_dword(pci_dev, 0x40, &val);
if ((val & 0x0000ff00) != 0)
pci_write_config_dword(pci_dev, 0x40, val &
0xffff00ff);
There is a similar fragment in the resume routine.
This change is probably not responsible for the DMA errors in the
4315, but there still could be some affect. Do you want to prepare a
patch for ssb, or should I do it?
Larry
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