Signed-off-by: Rafał Miłecki <[email protected]>
---
  drivers/net/wireless/b43/phy_n.c |   35 +++++++++++++++++++++++++++++++----
  1 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index c4c39de..5cd4b1a 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -314,11 +314,34 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
        b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
  }

+/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
+void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
+{
+       u32 tmslow;
+
+       if (dev->phy.type != B43_PHYTYPE_N)
+               return;
+
+       tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
+       if (force)
+               tmslow |= SSB_TMSLOW_FGC;
+       else
+               tmslow &= ~SSB_TMSLOW_FGC;
+       ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
+}
+
+/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
  static void b43_nphy_reset_cca(struct b43_wldev *dev)
  {
-       u16 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
+       u16 bbcfg;
+
+       b43_nphy_bmac_clock_fgc(dev, 1);
+       bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
        b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
+       udelay(1);
        b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
+       b43_nphy_bmac_clock_fgc(dev, 0);
+       //TODO: N PHY Force RF Seq with argument 2
  }

  /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
@@ -631,9 +654,13 @@ int b43_phy_initn(struct b43_wldev *dev)

        b43_nphy_workarounds(dev);

-       //TODO N PHY BMAC Clock FGC with argument 1
-       b43_nphy_reset_cca(dev);
-       //TODO N PHY BMAC Clock FGC with argument 0
+       /* Reset CCA, in init code it differs from standard way a little */
+       b43_nphy_bmac_clock_fgc(dev, 1);
+       tmp = b43_phy_read(dev, B43_NPHY_BBCFG);
+       b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA);
+       b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
+       b43_nphy_bmac_clock_fgc(dev, 0);
+
        //TODO N PHY MAC PHY Clock Set with argument 1
        //TODO Disable PA Override
        b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
-- 
1.6.4.2

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