Hi Haran,
               Even I am facing the same problem

On Thursday, 28 November 2013 13:43:10 UTC+5:30, Haran Ashok wrote:
>
> Hi ,
>
> I am currently working with audio configuration on Beagle Board XM Rev B 
> for ThreadX RTOS.
>
> The beagle board xm has TPS65950 <http://www.ti.com/product/TPS65950> as 
> the audio codec, which is connected to the core through McBSP 2.
>
>
> - I have written Mcbsp driver and it works fine in loopback mode.
>
>
> - I have written I2C controller driver to configure the 
> TPS65950<http://www.ti.com/product/TPS65950>audio codec, I verified the I2C 
> driver by writing data to a particular 
> offset on the Audio Codec and read it back and it gave the proper data that 
> was written.
>
>
> Now the problem is, i configured the audio codec as per the programming 
> guide on data manual of TPS 65950 for a play back scenario but i am able to 
> hear only the POP noise that occurs when the audio chip is initialized and 
> then i don't hear any sound at all on my headset.
>
> Following is the Mcbsp register dump and the Audio register dump
>
>
> ******************************************************************************
>
> "MCBSP Registers"
>
> PCR = 0x0 
> SPCR2 = 0x30 
> SPCR1 = 0x0 
> RCR2 = 0x0 
> RCR1 = 0x0 
> XCR2 = 0x1 
> XCR1 = 0x40 
> SRGR2 = 0x2000 
> SRGR1 = 0x1 
> MCR2 = 0x203 
> MCR1 = 0x0 
> RCERA = 0x0 
> RCERB = 0x0 
> XCERA = 0x1 
> XCERB = 0x0 
> RCERC = 0x0 
> RCERD = 0x0 
> XCERC = 0x0 
> XCERD = 0x0 
> RCERE = 0x0 
> RCERF = 0x0 
> XCERE = 0x0 
> XCERF = 0x0 
> RCERG = 0x0 
> RCERH = 0x0 
> XCERG = 0x0 
> XCERH = 0x0 
> REV = 0x23 
> RINTCLR = 0x0 
> ROVFLCLR = 0x0 
> SYSCONFIG = 0x0 
> THRS2 = 0x1 
> THRS1 = 0x0 
> IRQ STATUS = 0x0 
> IRQ ENABLE = 0x0 
> WAKEUPEN = 0x0 
> XCCR = 0x1800 
> RCCR = 0x808 
> XBUFF = 0x500 
> RBUFF = 0x0
>
> ***************************************************************************
>
> "Audio Registers"
>
> RX PATH SEL = 0xa 
> APPL CTL = 0x10 
> AVDAC CTL = 0x3 
> ARXL1 APGA CTL = 0x33 
> ARXR1 APGA CTL  = 0x33 
> SOFTVOL CTL = 0x1 
> CODEC MODE = 0x2 
> HS SEL = 0x72 
> ARXL1PGA = 0xbf 
> ARXR1PGA = 0xbf 
> ARXL1 APGA CTL = 0x33 
> ARXR1 APGA CTL = 0x33 
> HS GAIN SET = 0x5 
> ANAMICL = 0x0 
> MISC SET = 0x2 
> HS GAIN SET = 0xf 
> HS POPN SET = 0x6 
> Option = 0xc3
>
>
> *********************************************************************************
>
> Also please let me know if there is any way with which i can verify 
> whether data is actually flowing through the MCBsp and reaching the Audio 
> Codec.
>
> Regards
>
> Haran
>

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