From:  <[email protected]>
Reply-To:  <[email protected]>
Date:  Tuesday, December 10, 2013 at 12:28 PM
To:  <[email protected]>
Cc:  Don Smyth <[email protected]>
Subject:  [beagleboard] Linux 3.8, am335x, How to set up continuous DMA
transfers

> Reading the documentation on the EDMA peripheral for this part (am3352), it is
> clearly capable of doing continuous/chaining DMA transfers via the
> link-address mechanism.  The only method I see that interacts with this
> mechanism is the "CYCLIC" type transfer, which appears to set the address for
> the next transfer to the address of the current transfer.
> 
> I'd like to set up the DMA for chaining, with four buffers--two for transmit
> and two for receive, with the following behavior.
> 
> T_BUFF_1--currently in use
> 
> T_BUFF_2-address is loaded into link register of current transmit operation so
> that it is automatically utilized when the transfer from T_BUFF_1 completes.
> 
> R_BUFF_1-currently in use
> 
> R_BUFF_2-address is loaded into link register of current receive operation so
> that it is automatically utilized when the transfer into R_BUFF_1 completes.
> 
> Callback routines associated with these would just load the link-address
> associated with the new transfer with the address of the buffer not currently
> in use (the one having just finished).
> 
> So the transfers would look like T_BUFF_1 --> T_BUFF_2 --> T_BUFF_1 -->
> T_BUFF_2 -->.... and R_BUFF_1 --> R_BUFF_2 --> R_BUFF_1 --> R_BUFF_2 -->...
> 
> I don't see any full implementations of this in any example/sample code, and
> like I said, the "CYCLIC" transfers just seem to overwrite the same buffer,
> rather than update to a new buffer upon completion.
> 
> I am writing a replacement for the Linux 3.8 SPI driver ( "spi-omap2-mcspi.c"
> ) that does continuous transfers rather than the discreet message-queue
> method, in order to avoid the latency between handling of messages.

Hi Leo,
You mean DMA_CYCLIC? You should look at the DMA implementation for McBSP.
Unfortunately, TI didn¹t implement the McBSP driver on it¹s own, but instead
made it part of the sound driver implementation. I¹m working on the same
problem, but my SPI device generates the clock. This isn¹t the same as slave
mode in that my SPI device doesn¹t control the SPI chip select. I hoping I
can use the McBSP DMA implementation as a reference.
Regards,
John.
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