I ran into a similar finding on the A6 board.  Interestingly, the A5C works 
correctly.  These are with a battery connected.

I'm investigating a proper shutdown and power-off if the main 5V is 
removed.  I have a Li-Ion battery connected to keep everything running 
until a proper shutdown/power-off can occur.
Using the method in "Re: [beagleboard] Chip power down and PMIC_POWER_EN" 
while in Uboot, I can see that the A5C shuts everything down including the 
VDD_3V3B supply (see schematic).  The A6 does not.

Now if there is no battery connected, they both power-off.

So what's happening?

Brad

On Thursday, October 25, 2012 2:23:40 PM UTC-7, Andrew Bradford wrote:
>
> On Thu, 25 Oct 2012 16:13:48 -0500 
> Gerald Coley <[email protected] <javascript:>> wrote: 
>
> > You are correct. This is something we just ran into yesterday and we 
> > are looking at a solution. The solution is being tested and will not 
> > be something that shows up in the near future, but hopefully soon. It 
> > MAY be something that could be done with a wire mod, but it is too 
> > early to tell. Should know more by Monday. 
>
> Thanks!  So I'm not crazy, that's good to know. :) 
> Even if the wire mod is complex, it'd be great if you could share it. 
>
>
> > On Thu, Oct 25, 2012 at 4:07 PM, Andrew Bradford < 
> > [email protected] <javascript:>> wrote: 
> > 
> > > If I disable LDO3 in the TPS65217, VDD_3V3A should turn off. 
> > > VDD_3V3A turning off should disable U8 linear regulator causing 
> > > VDD_3V3EXP to turn off. 
> > > 
> > > It doesn't. 
> > > 
> > > Disabling LDO3 in the TPS65217 causes VDD_3V3A to drop to 
> > > approximately 2.4 V.  This is not low enough to disable the U8 
> > > linear regulator's enable pin.  Further, disabling LDO4 after this 
> > > only causes VDD_3V3A to drop to approximately 1.2 V.  Again, this 
> > > is not enough to disable U8 linear regulator's enable pin. 
> > > 
> > > I've tested on an A3 and an A6 bone. 
> > > 
> > > I realize there's grave impacts to disabling LDO3 or LDO4, ie: much 
> > > of the board won't work any more although the ARM core and DDR will 
> > > still be operating.  That's OK for my experiments. 
> > > 
> > > How can I turn off VDD_3V3EXP from software without completely 
> > > turning off all rails on the TPS65217?  Is it possible? 
> > > 
> > > I'm trying to do this in order to debug an issue we see with a 
> > > custom cape at power down when running on 3.7 V lithium battery. 
> > > With our cape attached, VDD_3V3EXP latches on even when the rest of 
> > > the BeagleBone is powered off.  This is due to SYS_5V staying 
> > > present due to the battery and U8 linear regulator not powering 
> > > down before the latch action occurs.  The TPS65217 and AM3359 are 
> > > both in the proper states, I can boot due to power button press 
> > > once in the OFF state (defined by the TPS65217 data sheet). But 
> > > keeping VDD_3V3EXP running will ruin the battery life while in the 
> > > OFF state. 
> > > 
> > > On the cape, we pull up to VDD_3V3EXP for things like MMC/SD and 
> > > I2C. I believe this is part of the problem as there may be power 
> > > back feeding through the pull-ups enough to cause the latch 
> > > situation.  But we believe we're following the recommended pull-up 
> > > strategy documented in the Bone SRM. 
> > > 
> > > Has any one else seen issues like this when attempting to enter the 
> > > TPS65217 OFF state with capes attached that use pull-ups to 
> > > VDD_3V3EXP while running on 3.7 V lithium battery power?  If so, 
> > > what capes work? 
> > > 
> > > Yes, I realize this is quite a corner case.  Sadly, it's an 
> > > important one for me. 
> > > 
> > > Thanks, 
> > > Andrew 
> > > 
> > > -- 
> > > 
> > > 
> > > 
> > 
> > 
>
>

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