SYS_RESET is the safest way to do it as it is a signal that can be used with enough delay to allow the 3V3B to settle. The desired requirement is after the 3V3B is up. But that is not a nice signal to track as it is a voltage rail. Easy is not always the best way.
Power down is in the reverse order of power up. Once 3V3B is removed your circuitry should be powered down at that point. Gerald On Tue, Feb 18, 2014 at 8:08 AM, <[email protected]> wrote: > The BBB manual says both these things about applying inputs to the I/O > pins:- > > NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES > HIGH. > > Do not drive any external signals into the I/O pins until after > the VDD_3V3B rail is up. > > > So, do these actually mean basically the same thing, or if not, which > one is actually correct? Using the VDD_3V3B to gate external input is > much easier because of its greater current capability but both are > available on the headers so one could use either. (Or even worse, is > it *really* an AND requirement?) > > When the BBB is powered down will these two signals go low early > enough so that input signals gated by them will be removed in time? > > -- > Chris Green > ยท > > -- > For more options, visit http://beagleboard.org/discuss > --- > You received this message because you are subscribed to the Google Groups > "BeagleBoard" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > For more options, visit https://groups.google.com/groups/opt_out. > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/groups/opt_out.
