On Tuesday, 28 October 2014 02:55:06 UTC, [email protected] wrote:
>
> Check their functional clocks are enabled in the CPM_PER_GPIO(2/3)_CLKCTRL
> registers.
>
Thanks. I have had a look in the Device Tree file and the only references
to the CM_PER_GPIO2_CLKCTRL seem to be the clocks being set up identically
in the ocp branch (shown below). Looking it up in the TRM, I also dug
around at location 0x44e00000 positions 0xac, 0xb0 and 0xb4) and only zeros
were returned. I am not sure what they are supposed to be.
Another difference in the device tree is that the ocp definitions of the
gpio's themselves are mostly identical except that gpio2 and gpio3 do not
have a phandle reference. Is it possible this has something to do with it?
Adding a phandle to those two did not fix the problem.
Is there a better place to check to see if these clocks are enabled? I
appreciate any insights you can give me as I track this down.
gpio0_dbclk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x14 0x15 0x12>;
reg = <0x53c>;
linux,phandle = <0x18>;
phandle = <0x18>;
};
gpio0_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x18>;
ti,bit-shift = <0x12>;
reg = <0x408>;
};
gpio1_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x12>;
ti,bit-shift = <0x12>;
reg = <0xac>;
};
gpio2_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x12>;
ti,bit-shift = <0x12>;
reg = <0xb0>;
};
gpio3_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x12>;
ti,bit-shift = <0x12>;
reg = <0xb4>;
};
--
For more options, visit http://beagleboard.org/discuss
---
You received this message because you are subscribed to the Google Groups
"BeagleBoard" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/d/optout.
