Hello jleb! Sorry for the late answer. I did some testing, meanwhile, and it seems that you're right. The ADC subsystem is clocked by CLK_M_OSC directly at 24 MHz. (First, I thought there's an additionaly pre-scaler in the PRCM.)
Find attached a libpruio measurement from four channels, connected to a PWM output by different voltage dividers. The PWM frequency and the sampling rate are configured that way that a complete period plus two pixels get shown in the window. The result is as expected, and even if I increase the frequencies, all looks good up to a sampling rate of 200 kHz. -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
