OK, seems I have to clarify this a bit: in my environment no Linux is 
involved, I'm digging within the hardware directly.

What I found meanwhile: some clocks have to be enabled. But setting 
CM_PER_PRU_ICSS_CLKCTRL to 0x00000002 and CM_PER_PRU_ICSS_CLKSTCTRL to 
0x00000010 (=CM_PER_PRU_ICSS_CLKSTCTRL_OCP_GCLK) did not do the trick.

Any other ideas?

Am Donnerstag, 6. November 2014 16:28:56 UTC+1 schrieb [email protected]:
>
> The PRU does need to be enabled, typically by a Device Tree entry similar 
> to this:
>
> fragment@4 {
>         target = <&pruss>;
>         __overlay__ {
>             status = "okay";
>         };
> };
>
> If using a cape of some kind, this would normally be in the device tree 
> setup for that cape.
> If it's your own custom cape, you would need to add this to your device 
> tree file.
> There may also be a suitable device tree overlay already installed in 
> /lib/firmware that you can simply enable, but I don't have my BBB in front 
> of me right now to check.
>
> On Wednesday, November 5, 2014 11:19:34 PM UTC-8, Karl Karpfen wrote:
>>
>> OK, the base address seems to be correct. Nevertheless CTRL-register isn 
>> ot readable, so it seems some important PRU-initialisations are missing. So 
>> is there any clock or power that has to be turned on for PRU?
>>
>>
>> Am Dienstag, 4. November 2014 17:54:03 UTC+1 schrieb Karl Karpfen:
>>>
>>> OK, I'm sure it is a stupid question but I don't find it in AM335x 
>>> TRM...there the offset of PRU_CTRL-register is defined with 0x00000000. But 
>>> what is the base address? I found a definition 0x4a322000 in one of 
>>> Starterware headers but this seems to be wrong.
>>>
>>> So what is correct base address for PRU0 registers and RAM areas?
>>>
>>>

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