Hi guys.
I am having problems getting pins 7 - 10 on the P8 header of the BBB to
switch the mux settings to pull down, so I can use these pins as outputs.
I'm putting these pins in my device tree overlay as a separate group, but
the new group is not showing up in
/sys/kernel/debug/pinctrl/44e10800.pinmux/pingroups, and the mux setting is
not changing in /sys/kernel/debug/pinctrl/44e10800.pinmux/pins.
Here's the relevant parts of my DTO:
/dts-v1/;
/plugin/;
/ {
compatible = "ti,beaglebone", "ti,beaglebone-black";
/* identification */
part-number = "BB-BONELT-WEICS";
version = "00A0";
/* state the resources this cape uses */
exclusive-use =
/* the pin header uses */
"P8.07",
"P8.08",
"P8.09",
"P8.10",
.
.
.
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
weics_override_pins: pinmux_weics_override_pins {
pinctrl-single,pins = <
0x090 0x27 /* P8_07 */
0x094 0x27 /* P8_08 */
0x09c 0x27 /* P8_09 */
0x098 0x27 /* P8_10 */
>;
};
.
.
.
fragment@3 {
target = <&ocp>;
__overlay__ {
/* avoid stupid warning */
#address-cells = <1>;
#size-cells = <1>;
weics_override_helper: helper {
compatible = "weics-override-helper";
pinctrl-names="default";
pinctrl-0 = <&weics_override_pins>;
status="okay";
};
.
.
.
};
Two things to note:
1: I can confirm this DTO has configured two CAN channels and an LCD panel
correctly, so it's indeed loading at boot time.
2: Cape manager isn't being used in order to optimize boot time. I didn't
build this kernel, so I'm not sure if u-boot is configured to apply this
particular overlay or what.
My questions is this: Am I missing something else in my DTO to get the
pinmux settings I want for these pins?
Thanks!
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