Thanks Jason,

 There is a hardware solution to my problem in a form of a tiny logic 
08 (AND gate). The PWM is connected to one input and an extra ENABLE signal 
from GPIO is connected to another input. On the output the resulting gated 
PWM signal will appear when the ENABLE signal goes high from the 
application.
The solution however is non-elegant and can be avoided if I had a better 
knowledge of the software - in this case a PWM driver and it's interaction 
with a device tree overlay.

The inverter is not a solution as on boot initial pin value is low and 
after the device tree is loaded it jumps high until the application 
software (controlling pwm) takes over.
I will use it as a temporary solution.

Cheers

Jan


On Wednesday, 26 November 2014 08:45:34 UTC+11, Jason Lange wrote:
>
>
>
> - after power on the logic level on P8_13 is low (as I want it to be)
>>> - after that (loading dtc overlay) the logic level on P8_13 become high 
>>> (I dont want it)
>>>
>>
> Sorry, I missed this.  The 74HC04 would work if it started high and stayed 
> that way.  Do you need to use an overlay?  Maybe if you modified the 
> initial device tree, perhaps with Roberts system for the 3.14 kernel it 
> would start high and you could flip it.
>
>  

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