Hi,

I'm working on a custom BBB with a 3-port ethernet switch-on-a-chip (Micrel 
KSZ8863).

The switch is configured to start automatically in unmanaged mode.

After U-Boot, kernel, and device-tree changes the switch is working.

Now I need a way to manage the switch - to setup VLAN's, etc.

To do this requires access to extended registers on the switch.

The extended registers can be accessed with SPI, I2C, or MDIO,
but only MDIO is connected on the custom board.

To access the extended registers over MDIO the switch needs to use the 
SMI(?) protocol.
This requires a few bits to be changed in the MDIO frame (opcode and r/w 
bits).

Is the BBB hardware capable of sending the non-standard MDIO frames?

I was hoping to use "mdio rx" and "mdio wx" CLI commands from U-Boot to 
manage the switch
(after adding extread() and extwrite() functions in 
drivers/net/phy/micrel.c)
but I cannot figure out what these functions should do.

The "mdio read" and "mdio write" commands work from U-boot for normal MDIO 
frames.
I thought I could copy the functions used by these and change the opcode,
however I'm confused about how these functions work.

It is my understanding that all MDIO frames start with bits 0 followed by 1.

The value passed to __raw_writel() in drivers/net/cpsw.c function 
__raw_writel()
does not start with 0+1.

For example when querying register 1 on phy address 3 the value of 'reg' 
passed in __raw_writel() is:
   reg=0x80230000

Why aren't the first two bits 0 and 1?
(Also the 3rd and 4th bits should be 1 and 0 to specify a read operation, 
but this is not the case.)

Is this value being written directly to the MDIO bus?
Or is it sent to a MDIO controller (Davinci?) which then sends a different 
value on the bus?

Is there another way to send SMI frames from U-Boot? or after starting the 
OS? 

Thanks.

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