On Thursday, August 13, 2015 at 2:01:48 PM UTC-5, TJF wrote: > > Hi! > > The assembler also supports a NOPn operation (NOP0 - NOPf). See SRM > chapter 5.3.4.1.18 for details. > > BR >
I read that (SRM page 61) and mentioned in my post that I had tried them. "thus far every iteration I have tried of NOPx results in 'instruction illegal for core version'". NOP0, NOP1, NOP2, NOP3, ect all give the same result. The SRM says they are undefined and doesn't provide much insight beyond that. I can go the .macro route but it seems awkward, and I've never worked on a platform that didn't have a NOP instruction. If the .macro works then so be it, I just need the instruction to take 5ns. I don't much care how it does it really. I just don't want to add confusion by it being duplicate instructions. -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
