Thanks !

It's still not at all clear to me how the system wall time and the adc 
sample time could be related, here 
<https://groups.google.com/forum/#!searchin/beagleboard/timestamp/beagleboard/nbjIofTzgd4/Mi8RFm7VdugJ>another
 
question similar to the one I have, Rick M suggests to:

   -  use a sw PLL with a frequency related to the needed accuracy, linked 
   to the pps generated by a GPS module, to update a timer.


   - let the PRU read the timer value at every sample
   - subtract the reading latencies

the problem is that I don't have a PPS signal avaiable, I could modify the 
ntpd poll interval of the ntpd. It would be perfect if I could enable the 
PRU IEP timer (ocp_clk 200 Mhz) )soon after the gettimeoftheday() function 
call and then trigger the ADC.
Is this nonsense talk?

V.

Il giorno giovedì 13 agosto 2015 21:37:21 UTC+2, TJF ha scritto:
>
> Hi!
>
> Am Donnerstag, 13. August 2015 17:39:39 UTC+2 schrieb Valeria M.:
>>
>> The original plan was to use as synchronization source (of the system 
>> clock) a ptp clock or ntp server and acquire the samples one second 
>> (200ksamples) a time and attach a timetag to every one of them, and thatìs 
>> why I was looking for a way to force the fifo counter rollover, I've the 
>> horrible feeling to have posed the question the wrong way and have 
>> mistaken the whole clock concept.
>>
>
> You could use libpruio in MM (Measurement Mode) to sample a block of 200 
> ksamples at 200 ksample/s. Note: the default size of the external memory is 
> 128 ksamples, so you have to configure the PRUSS driver (uio_pruss) for 
> bigger external memory. See this page 
> <http://users.freebasic-portal.de/tjf/Projekte/libpruio/doc/html/_cha_memory.html>,
>  
> secition *ERam* (at the bottom).
>
> BR
>

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