The PRU have 10 interrupts: 2 for the host and 8 that are exported to 
general ARM interrupts. You should check page 225 of the TRM. Host 0 and 
Host 1 (which are the low bits on the INTC0 register or something like 
that) are reserved for the PRUs to signal the ARM core. The other 8 can be 
attached to many different interrupts (64 with codes presented in Table 
4.21 of the TRM).

I recall vaguely concluding that it wasn't possible (or was too 
complicated) when I looked into that, but if you find a way it's great. 
Still, you'll have to rewrite the INTC initialization vector yourself to 
associate the appropriate interrupts to each channel and each channel to 
each host. If your application is not really sensitive to timing issues 
(i.e., if you can manage to stick a few more commands in there to 
control/check for the interrupts), I would not bother and would simply 
implement an interrupt vector.

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