A few other bits of information is needed to get to the bottom of this.
- When you run the code on PRU0, what is running on PRU1? Do you put it in 
reset or at least have it doing something that cannot interfere?

- Is everything in the local memory to the PRU in use or in the shared memory?

- Is there any access outside of the PRUSS (i.e. DRAM, non PRUSS peripherals)?

- Is the ARM side also reading/probing the memory belonging to the PRU in use?

- Does the STALL register indicate that is occurring for some reason and 
enough to account for the difference?

On Wednesday, December 23, 2015 11:27:22 Bill Gray wrote:
> Hi,
> 
> I am trying to debug a weird behavior.
> 
> I have code running on PRU 1 that creates a specific waveform on 8 pru
> output pins (pru1_0 - pru1_7).
> 
> I am trying to confirm the accuracy of my PRU 1 code by running code on PRU
> 0 that watches the pins on PRU 1 (physically linked) and measures their
> period, duty, etc. against the CYCLE counter in the PRU0 control register.
> 
> All is well and good except that some of my measurements are off by +-1
> instruction... so where I hope to see 1280 instructions in a period, I am
> seeing 1279 or 1281.
> 
> Interestingly this changes... apparently regularly?  If I take the same
> measurement over and over I will get measurements for about 2 seconds
>  where the result is -1 and then 2 seconds of measurements where the result
> is +1... then back to -1, etc.
> 
> One explanation for this is that there is a slight phase shift between the
> PRU1 and PRU0 clocks.
> 
> ...But that goes against my understanding that the PRU clocks are both
> derived directly from the main CPU clock.
> 
> Still, the phase shift explanation fits the data really really nicely.
> 
> Is a phase shift between the PRU clocks even possible?
> 
> Thanks,
> 
> Bill

-- 
Hunyue Yau
http://www.hy-research.com/

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