The PRU rise and fall times are 1.00 - 3.00 nSec. Your scope probe or 
application circuit may be limiting the slew rate. Another possibility is your 
oscilloscope input is bandwidth limited. If you are using a 1X scope probe it 
will contribute significant capacitive loading and slow the edges way down.


Keep us informed with your progress and good luck.


Cheers,

Lowell Bohn
Chief Engineer
Basis Vector LLC
(303) 249-3763



-----Original Message-----
From: Przemek Klosowski [mailto:[email protected]]
Sent: Tuesday, February 16, 2016 10:53 PM
To: [email protected]
Subject: Re: [beagleboard] Slew rate when toggling Enhanced GPIO pins in the 
PRU?

On Tue, Feb 16, 2016 at 4:08 PM, John M <[email protected]> wrote:
I'm trying to create a clock using the PRU, and I have it working to an extent, 
but I am noticing a discrepancy between what I read in the TRM and what I'm 
seeing. When I use a series of SET CLR SET CLR commands on a pin, they do not 
resolve completely before the next command. When I seperate each command by a 
delay, the rising edge of the clock takes ~90ns to go from 0V to 3.3V. I was 
under the impression that this operation would be performed at around ~5ns.




 Straight out Set/Clear would theoretically run at 100MHz (two instructions of 
5ns each), but when you connect them to the chip I/O, there are effects of 
interconnect between the PRU and the I/O resources, Charles Steinkuehler wrote 
it up in 
https://github.com/machinekit/machinekit/blob/master/src/hal/drivers/hal_pru_generic/pru_generic.p

However, the rise time of the signal as seen by your oscilloscope is totally 
unrelated to that: the signal on a pin should change within a IO clock cycle 
and the skew you're seeing must be due to the RC(L) delays due to factors such 
as the state of the pullup on the IO pin, capacitances and inductances within 
the package, on your board and in your oscilloscope probe and cable.






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