http://kmingk.com/audio-project-on-beagle-bone-black/2013/10/30/testing-limits-of-beaglebone-black-pwm

According to him, 9Mhz for audio "safe" PWM.

On Fri, Feb 26, 2016 at 7:26 PM, William Hermans <[email protected]> wrote:

> *I don't expect any response to this -- I think by now I'm rambling on*
>> * very vague hypothetical conditions...*
>
>
> Well then, this post is a figment of your imagination ;) Anyway, I don't
> know much of PWM "theory", but just going by the file system attribute
> names. Resolution is adjustable to the nanosecond, as is duty cycle. But at
> any rate, a 2Mhz PWM would be fairly high. Especially considering that
> *a)* this is a "freebie" on die module, and *b)* PWM functionality
> requires no additional interaction from the main processor( but changing
> parameters does, which is trivial / expected ).
>
> Anyway, 1ns high, 1ns low. So whatever 2ns works out to.
>
> On Fri, Feb 26, 2016 at 7:08 PM, Dennis Lee Bieber <[email protected]>
> wrote:
>
>> On Fri, 26 Feb 2016 14:11:08 -0700, William Hermans
>> <[email protected]> declaimed the following:
>>
>> > the PWM pulse rate should not be effected by any software - Period.
>> >Changing rates now perhaps would be. sysfs for instance would be slower
>> >than using mmap(), or the PRU's, but I'm not exactly sure that the speed
>> of
>> >which you can change the pulse rate is all that important. For most use
>> >cases . . . As something like the control for DC/DC switching would need
>> to
>> >change dynamically, and very quickly.
>> >
>> >Anyway, given this, the maximum frequency of the PWM should be what is
>> >listed in the TRM for the hardware module.
>> >
>>         Not the easiest document to read (especially for an old
>> programmer of
>> number cruncher applications on "mainframes"... I've only gotten into the
>> embedded world in the last three years and am struggling to understand the
>> systems at work)...
>>
>>         But... If I understand that TI document. 100MHz clock. The duty
>> cycle
>> is a value in a comparison against another value (a counter setting the
>> period/wavelength)... So for the minimum square wave, if the duty cycle
>> value is "1", the counter limit would need to be "2"... Giving a 50MHz
>> square wave (ignoring rise-time slew on the actual output signals -- I
>> suspect the output will look more like a triangle wave at that speed). No
>> proportional control available.
>>
>>         The section on the "high resolution PWM" shows a table that goes
>> all
>> the way up to... 2MHz... Though if loss of "1 bit" of HRPWM is equivalent
>> to a doubling in frequency, and 2MHz is 11 bits...
>> 4       10
>> 8       9
>> 16      8
>> 32      7
>> 64      6
>>
>> Regular PWM is less than 6bits at 2MHz and that gives
>> 4       5
>> 8       4
>> 16      3
>> 32      2
>> 64      1 bit?
>>
>>         Though reading further indicates that HRPWM works by fine-tuning
>> the
>> transition point of the regular PWM... So I suspect for a square wave one
>> is still limited to the regular PWM rate... and 32MHz might be the
>> effective limit.
>>
>>         I don't expect any response to this -- I think by now I'm
>> rambling on
>> very vague hypothetical conditions...
>> --
>>         Wulfraed                 Dennis Lee Bieber         AF6VN
>>     [email protected]    HTTP://wlfraed.home.netcom.com/
>>
>> --
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>
>

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