Am 22.07.2016 um 07:17 schrieb John Syne: > First, I think this mailing list is the wrong forum to discuss this issue
We have two issues here. OK, for the API the forum may be the wrong place.
But the CPU protection is a Beaglebone only issue. I think Gerald made a
good job when he provided more CPU balls then header pins available. We
just need software to handle that trick in a safe manner. I think this
issue needs a patch in the Beaglebone kernel, only. Where, if not in
this forum, should I discuss this?
> I would suggest posting a RFC to the Linux or Linux-ARM mailing list and see
> what feedback you get. Any changes here will affect all architectures so best
> to iron this out with all the stakeholders.
I haven't done this yet. When I google, I get several links to different
places. Can you please provide links where to find the lists you're
talking about.
> and second, I’m not sure which driver needs to be updated to implement this
> feature. I think from our last discussion gpiolib seemed like the right place
> to implement this feature, but pinctl-single could also be the right place. I
> haven’t looked into this for a while.
Before posting an RFC, we should find the right places for changes, at
least for the CPU safety issue. I'm sure gpiolib is the wrong driver.
Device tree entries for pinmuxing look like
> B68_2F: 68_2F {pinctrl-single,pins = <0x164 0x2F 0x1A0 0x2F>;};
This pinctrl-single driver seems to be the right one.
And since I'm not familiar with kernel drivers, I'd really appreciate
your help to find the right driver to implement the API. This would help
me to write the RFC up.
First I thought a single entry in /sys/devices/ocp could do the job. But
I guess that may violate the security concept, since each CPU ball could
get accessed that way. So the API should provide access only for claimed
pins (each with a folder containing a state file). And therefor, an
adaption in bone-pinmux-helper may be necessary as well.
Your appraisal is much appriciated.
BR
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