Hi,
I am just trying to learn the linux kernel booting process for arm32 Cortex
A9 multi core SOC. I had understood the concept of booting in linux, but I
am confused about the section where secondary cores enabling from primary
core. Can somebody briefly explains me about the assembly instructions in
head.S for enabling the secondary cpus from primary cpu and which registers
are actually involved during these assembly operations
adr r4, __secondary_data
ldmia r4, {r5, r7, r12}
sub lr, r4, r5
add r3, r7, lr
ldrd r4, [r3, #0]
ARM_BE8(eor r4, r4, r5)
ARM_BE8(eor r5, r4, r5)
ARM_BE8(eor r4, r4, r5)
ldr r8, [r3, #8]
badr lr, __enable_mmu
mov r13, r12
ldr r12, [r10, #PROCINFO_INITFUNC]
add r12, r12, r10
ret r12
Thanks, manish
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