Hello all, I have a Beaglebone Black reading from an FPGA over SPI. I'm trying to get the interface as fast as possible. I can set the clock rate fine and am running well at 24MHz. In looking on an oscilloscope, there is a gap of ~1us between each byte when although the bit rate is 24MHz. Is there a setting that can be changed to minimize the gap? Is there a parameter for spidev that can be adjusted?
I'm using Debian 3.8.13-bone70 and the Adafruit BBIO library with Python. Also, I'm using a xfer2 where the select line stays low for the entire transfer. Thanks, Dave -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/10a2ef88-69bd-4e3a-9b09-77134556e94d%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
