I'm using a Beaglebone Green and trying to interface with both an LCD7 (4DCAPE-70T) <http://cdn.sparkfun.com/datasheets/Dev/Beagle/4DCAPE-70T_datasheet_R_1_1.pdf> which is based off of the BB-BONE-LCD7-01:00A3 revision and the CAN Cape ( TT3201-001:05 <http://www.towertech.it/en/products/hardware/tt3201-can-cape/manual/> revision).
The LCD cape comes with an expansion header (all the pins that aren't used by the LCD cape are ported to the header -- look at the data sheet linked above to get the idea). Both capes work perfectly individually, but when I try to use them together, I get the following output. root@beaglebone:~# dmesg | grep cape [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=UUID=5df5404c-a947-481b-8730-2a4bb771d33e ro rootfstype=ext4 rootwait coherent_pool=1M quiet cape_universal=enable [ 3.925280] bone_capemgr bone_capemgr: Baseboard: 'A335BNLT,BBG1,BBG116044309' [ 3.925315] bone_capemgr bone_capemgr: compatible-baseboard=ti,beaglebone-black - #slots=4 [ 3.967132] bone_capemgr bone_capemgr: slot #0: '4D 7.0 LCD CAPE- 4DCAPE-70T ,00A3,4D SYSTEMS ,BB-BONE-LCD7-01' [ 4.023037] bone_capemgr bone_capemgr: slot #1: No cape found [ 4.082948] bone_capemgr bone_capemgr: slot #2: No cape found [ 4.112954] bone_capemgr bone_capemgr: slot #3: 'TT3201 CAN Bus Cape,05,TowerTech,TT3201-001' [ 4.113486] bone_capemgr bone_capemgr: initialized OK. [ 4.130310] bone_capemgr bone_capemgr: slot #3: TT3201-001 conflict P9.27 (#0:BB-BONE-LCD7-01) [ 4.139161] bone_capemgr bone_capemgr: slot #3: Failed verification [ 4.154974] bone_capemgr bone_capemgr: slot #3: TT3201-001 conflict P9.27 (#0:BB-BONE-LCD7-01) [ 4.165624] bone_capemgr bone_capemgr: slot #0: dtbo 'BB-BONE-LCD7-01-00A3.dtbo' loaded; overlay id #0 [ 4.170778] bone_capemgr bone_capemgr: slot #3: Failed verification [ 4.183178] bone_capemgr bone_capemgr: loader: failed to load slot-3 TT3201-001:05 (prio 0) [ 14.366425] bone_capemgr bone_capemgr: part_number 'GPIO-Test', version 'N/A' [ 14.366464] bone_capemgr bone_capemgr: slot #4: override [ 14.366482] bone_capemgr bone_capemgr: Using override eeprom data at slot 4 [ 14.366499] bone_capemgr bone_capemgr: slot #4: 'Override Board Name,00A0,Override Manuf,GPIO-Test' I'm using Debian with the following kernel: root@beaglebone:~# uname -r 4.1.15-ti-rt-r43 I've tried doing the obvious thing by taking the conflict pin (P9_27) entirely out of the LCD .dts file by changing it to P9_11 (which isn't used by either) (then compiled and put the .dtbo in /lib/firmware) but that doesn't work. This is the .dts file for BB-BONE-LCD7-01-00A3 /* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; /plugin/; #include </dt-bindings/board/am335x-bbw-bbb-base.h> #include </dt-bindings/gpio/gpio.h> #include </dt-bindings/pinctrl/am33xx.h> / { compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green"; /* identification */ part-number = "BB-BONE-LCD7-01"; version = "00A3"; /* state the resources this cape uses */ exclusive-use = /* the pin header uses */ "P8.45", /* lcd: lcd_data0 */ "P8.46", /* lcd: lcd_data1 */ "P8.43", /* lcd: lcd_data2 */ "P8.44", /* lcd: lcd_data3 */ "P8.41", /* lcd: lcd_data4 */ "P8.42", /* lcd: lcd_data5 */ "P8.39", /* lcd: lcd_data6 */ "P8.40", /* lcd: lcd_data7 */ "P8.37", /* lcd: lcd_data8 */ "P8.38", /* lcd: lcd_data9 */ "P8.36", /* lcd: lcd_data10 */ "P8.34", /* lcd: lcd_data11 */ "P8.35", /* lcd: lcd_data12 */ "P8.33", /* lcd: lcd_data13 */ "P8.31", /* lcd: lcd_data14 */ "P8.32", /* lcd: lcd_data15 */ "P8.27", /* lcd: lcd_vsync */ "P8.29", /* lcd: lcd_hsync */ "P8.28", /* lcd: lcd_pclk */ "P8.30", /* lcd: lcd_ac_bias_en */ "P9.11", /* lcd: gpio3_19 DISPEN */ "P9.12", /* led: gpio1_28 LED */ "P9.14", /* pwm: ehrpwm1a PWM_BL */ "P9.15", /* keys: gpio1_16 LEFT */ "P9.23", /* keys: gpio1_17 RIGHT */ "P9.16", /* keys: gpio1_19 UP */ "P9.30", /* keys: gpio3_16 DOWN */ "P9.21", /* keys: gpio0_3 ENTER */ "ehrpwm1a", "gpio0_30", /* DISPEN */ "gpio1_28", /* LED */ "gpio1_16", /* LEFT */ "gpio1_17", /* RIGHT */ "gpio1_19", /* UP */ "gpio3_16", /* DOWN */ "gpio0_3", /* ENTER */ "lcdc", "tscadc"; fragment@0 { target = <&am33xx_pinmux>; __overlay__ { bb_lcd_led_pins: pinmux_bb_lcd_led_pins { pinctrl-single,pins = < BONE_P9_12 (PIN_INPUT | MUX_MODE7) /* gpmc_ben1.gpio1_28, INPUT | PULLDIS | MODE7 */ >; }; bb_lcd_pwm_backlight_pins: pinmux_bb_lcd_pwm_backlight_pins { pinctrl-single,pins = < BONE_P9_14 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_a2.ehrpwm1a */ >; }; bb_lcd_lcd_pins: pinmux_bb_lcd_lcd_pins { pinctrl-single,pins = < BONE_P9_11 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_fsr.gpio3_19 */ BONE_P8_45 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ BONE_P8_46 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ BONE_P8_43 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ BONE_P8_44 (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ BONE_P8_41 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ BONE_P8_42 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ BONE_P8_39 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ BONE_P8_40 (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ BONE_P8_37 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ BONE_P8_38 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ BONE_P8_36 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ BONE_P8_34 (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ BONE_P8_35 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ BONE_P8_33 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ BONE_P8_31 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ BONE_P8_32 (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ BONE_P8_27 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ BONE_P8_29 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ BONE_P8_28 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ BONE_P8_30 (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ >; }; bb_lcd_keymap_pins: pinmux_bb_lcd_keymap_pins { pinctrl-single,pins = < BONE_P9_15 (PIN_INPUT | MUX_MODE7) /* gpmc_a0.gpio1_16 */ BONE_P9_23 (PIN_INPUT | MUX_MODE7) /* gpmc_a1.gpio1_17 */ BONE_P9_16 (PIN_INPUT | MUX_MODE7) /* gpmc_a3.gpio1_19 */ BONE_P9_30 (PIN_INPUT | MUX_MODE7) /* mcasp0_axr0.gpio3_16 */ BONE_P9_21 (PIN_INPUT | MUX_MODE7) /* spi0_d0.gpio0_3 */ >; }; }; }; fragment@1 { target = <&epwmss1>; __overlay__ { status = "okay"; }; }; fragment@2 { target = <&ehrpwm1>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&bb_lcd_pwm_backlight_pins>; status = "okay"; }; }; fragment@3 { target = <&lcdc>; __overlay__ { status = "okay"; }; }; fragment@4 { target = <&tscadc>; __overlay__ { status = "okay"; tsc { ti,wires = <4>; ti,x-plate-resistance = <200>; ti,coordinate-readouts = <5>; ti,wire-config = <0x00 0x11 0x22 0x33>; }; adc { ti,adc-channels = <4 5 6 7>; }; }; }; fragment@5 { target-path="/"; __overlay__ { /* avoid stupid warning */ #address-cells = <1>; #size-cells = <1>; backlight { status = "okay"; compatible = "pwm-backlight"; pwms = <&ehrpwm1 0 500000 0>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 >; default-brightness-level = <100>; }; gpio-leds-cape-lcd { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&bb_lcd_led_pins>; lcd-led0 { label = "lcd:green:usr0"; gpios = <&gpio1 28 0>; linux,default-trigger = "heartbeat"; default-state = "off"; }; }; gpio_keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&bb_lcd_keymap_pins>; #address-cells = <1>; #size-cells = <0>; button@1 { debounce_interval = <50>; linux,code = <105>; label = "left"; gpios = <&gpio1 16 0x1>; gpio-key,wakeup; autorepeat; }; button@2 { debounce_interval = <50>; linux,code = <106>; label = "right"; gpios = <&gpio1 17 0x1>; gpio-key,wakeup; autorepeat; }; button@3 { debounce_interval = <50>; linux,code = <103>; label = "up"; gpios = <&gpio1 19 0x1>; gpio-key,wakeup; autorepeat; }; button@4 { debounce_interval = <50>; linux,code = <108>; label = "down"; gpios = <&gpio3 16 0x1>; gpio-key,wakeup; autorepeat; }; button@5 { debounce_interval = <50>; linux,code = <28>; label = "enter"; gpios = <&gpio0 3 0x1>; gpio-key,wakeup; }; }; panel { status = "okay"; compatible = "ti,tilcdc,panel"; pinctrl-names = "default"; pinctrl-0 = <&bb_lcd_lcd_pins>; panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; dma-burst-sz = <16>; bpp = <16>; fdd = <0x80>; sync-edge = <0>; sync-ctrl = <1>; raster-order = <0>; fifo-th = <0>; }; display-timings { native-mode = <&timing0>; /* Settings for ThreeFive S9700RTWV35TR / LCD7 cape: */ timing0: 800x480 { clock-frequency = <30000000>; hactive = <800>; vactive = <480>; hfront-porch = <40>; hback-porch = <40>; hsync-len = <48>; vback-porch = <30>; vfront-porch = <13>; vsync-len = <3>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <0>; }; }; }; }; }; }; I also tried modifying the TT3201 CAN cape .dts file to the following (changing the p9-27 to p9-11) /* * Copyright (C) 2013 Tower Technologies * Written by Alessandro Zummo <a.zu...@towertech.it> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; /plugin/; / { compatible = "ti,beaglebone", "ti,beaglebone-black"; part-number = "TT3201-001"; version = "01"; /* state the resources this cape uses */ exclusive-use = /* the pin header uses */ "P9.11", /* spi irq: gpio0_30 */ "P9.23", /* spi irq: gpio1_17 */ "P9.31", /* spi: spi1_sclk */ "P9.29", /* spi: spi1_d0 */ "P9.30", /* spi: spi1_d1 */ "P9.28", /* spi: spi1_cs0 */ "P9.42", /* spi: spi1_cs1 */ "P9.26", /* dcan1: dcan1_tx */ "P9.24", /* dcan1: dcan1_rx */ /* the hardware IP uses */ "gpio0_30", "gpio1_17", "spi1", "dcan1"; fragment@0 { target = <&am33xx_pinmux>; __overlay__ { bone_tt3201_dcan1_pins: bone_tt3201_dcan1_pins { pinctrl-single,pins = < 0x180 0x02 /* uart1_rxd.d_can1_tx", OUTPUT | MODE2 */ 0x184 0x32 /* uart1_txd.d_can1_rx", INPUT_PULLUP | MODE2 */ >; }; bone_tt3201_spi1_pins: pinmux_bone_tt3201_spi1_pins { pinctrl-single,pins = < 0x190 0x33 /* mcasp0_aclkx.spi1_sclk, RX_ENABLED | PULLUP | MODE3 */ 0x194 0x33 /* mcasp0_fsx.spi1_d0, RX_ENABLED | PULLUP | MODE3 */ 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */ 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */ 0x164 0x12 /* ecap0_in_pwm0_out.spi1_cs1, OUTPUT_PULLUP | MODE2 */ >; }; bone_tt3201_mcp2515_0_pins: pinmux_bone_tt3201_0_mcp2515_pins { pinctrl-single,pins = < 0x1a4 0x37 /* mcasp0_fsr.gpio3_19, RX_ENABLED | PULLUP | MODE7 */ >; }; bone_tt3201_mcp2515_1_pins: pinmux_bone_tt3201_1_mcp2515_pins { pinctrl-single,pins = < 0x044 0x37 /* gpmc_a1.gpio1_17, RX_ENABLED | PULLUP | MODE7 */ >; }; }; }; fragment@1 { target = <&spi1>; __overlay__ { #address-cells = <1>; #size-cells = <0>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&bone_tt3201_spi1_pins>; cs-gpios = <&gpio4 17 0>, <&gpio1 7 0>; mcp2515@0 { compatible = "microchip,mcp2515"; reg = <1>; /* cs1 */ mode = <0>; spi-max-frequency = <10000000>; pinctrl-names = "default"; pinctrl-0 = <&bone_tt3201_mcp2515_1_pins>; interrupt-parent = <&gpio2>; interrupts = <17>; mcp251x,oscillator-frequency = <16000000>; mcp251x,irq-gpios = <&gpio2 17 0>; mcp251x,stay-awake = <1>; }; mcp2515@1 { compatible = "microchip,mcp2515"; reg = <0>; /* cs0 */ mode = <0>; spi-max-frequency = <10000000>; pinctrl-names = "default"; pinctrl-0 = <&bone_tt3201_mcp2515_0_pins>; interrupt-parent = <&gpio1>; interrupts = <30>; mcp251x,oscillator-frequency = <16000000>; mcp251x,irq-gpios = <&gpio1 30 0>; mcp251x,stay-awake = <1>; mcp251x,enable-clkout = <1>; }; }; }; fragment@2 { target = <&dcan1>; __overlay__ { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&bone_tt3201_dcan1_pins>; }; }; }; so currently, P9-27 isn't in either of the .dtbo files, in both I've changed it to P9_11 but I'm still getting the same conflict error for P9-27. >From what I understand, the conflict occurs before either of the overlay files are loaded so that might be running the error. I figured that I would have to modify the EEPROM file of the LCD cape to disable the P9-27 pin but I'm unable to access the EEPROM. In fact, it doesn't even exist in /sys/bus/i2c/drivers/at24/2-0054 and when I try to create an EEPROM file it says "permission denied". This is odd because I was able to view/modify it a few days ago. I have shorted the WP pins on the LCD Cape already. root@beaglebone:~# cd /sys/bus/i2c/drivers/at24/ root@beaglebone:/sys/bus/i2c/drivers/at24# ls 0-0050 2-0054 2-0055 2-0056 2-0057 bind uevent unbind root@beaglebone:/sys/bus/i2c/drivers/at24# cd 2-0054 root@beaglebone:/sys/bus/i2c/drivers/at24/2-0054# ls at24-1 driver modalias name of_node power subsystem uevent How do I solve this conflict error? -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/80dda54f-46e1-4982-882e-754f1667bbb0%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
