Thanks Charles, that's very helpful. I didn't know about the IEP timer. TRM
section 4.4.3.1 says I can hook up the IEP clock source to either iep_clk
or ocp_clk. Which one of those clocks drives the PRU cycle counter?

Thanks,
Justin



On Thu, Dec 22, 2016 at 1:43 PM, Charles Steinkuehler <
[email protected]> wrote:

> On 12/22/2016 10:45 AM, Justin Pearson wrote:
> > I have the same question.
> >
> > I'm using the PRU's 200 MHz cycle counter to timestamp sensor
> measurements. At
> > 200 MHz, this 32-bit counter overflows in 20 seconds. I would like to
> notify a C
> > program running on the 1GHz host ARM processor as soon as it overflows.
> >
> > *Is it possible to configure the PRU cycle counter to trigger an
> interrupt in
> > the host ARM when it overflows?*
>
> Do you mean the Cycle register (offset 0x0C in the PRU_ICSS_PRU_CTRL
> register bank)?  If so, this counter doesn't even wrap around (it
> automatically stops when it hits 0xFFFFFFFF) much less generate an
> interrupt.
>
> > I know how to write PRU code to make the PRU trigger an interrupt in the
> host,
> > but that's not quite what I want, since my PRU will be busy doing other
> things.
> > I would like the cycle counter to trigger an interrupt automatically,
> without
> > the PRU having to check if it has overflowed.
>
> Try using the IEP timer.  It will wrap automatically, and you can even
> setup a configurable period by using compare register zero and setting
> the CMP0_RST_CNT_EN bit.  You can also route an IEP timer event
> (pr1_iep_tim_cap_cmp_pend) to the ARM core to generate an interrupt.
>
> --
> Charles Steinkuehler
> [email protected]
>
> --
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