Further testing shows that there is a conflict during bootup [ 2.798087] bone_capemgr bone_capemgr: Using override eeprom data at slot 8 [ 2.798124] bone_capemgr bone_capemgr: slot #8: 'Override Board Name,00A0,Override Manuf,BB-ADC' [ 2.799100] bone_capemgr bone_capemgr: initialized OK. [ 2.807649] PM: bootloader does not support rtc-only! [ 2.809270] omap_rtc 44e3e000.rtc: setting system clock to 2016-09-01 10:26:24 UTC (1472725584) [ 2.809354] of_cfs_init [ 2.809539] of_cfs_init: OK [ 2.813323] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 184, base_baud = 3000000) is a 8250 [ 2.818299] 481a8000.serial: ttyS4 at MMIO 0x481a8000 (irq = 186, base_baud = 3000000) is a 8250 [ 2.819877] *pinctrl-single 44e10800.pinmux: pin 44e10954.0 already requested by 481a8000.serial; cannot claim for 48024000.serial* [ 2.819962] pinctrl-single 44e10800.pinmux: pin-85 (48024000.serial) status -22 [ 2.820010] pinctrl-single 44e10800.pinmux: could not request pin 85 (44e10954.0) from group pinmux_bb_uart2_pins on device pinctrl-single [ 2.820064] omap8250 48024000.serial: Error applying setting, reverse things back [ 2.821135] 48024000.serial: ttyS2 at MMIO 0x48024000 (irq = 187, base_baud = 3000000) is a 8250 [ 2.823309] 481aa000.serial: ttyS5 at MMIO 0x481aa000 (irq = 188, base_baud = 3000000) is a 8250 [ 2.824063] bone_capemgr bone_capemgr: slot #4: dtbo 'BB-UART1-00A0.dtbo' loaded; overlay id #0 [ 2.824367] bone_capemgr bone_capemgr: slot #7: dtbo 'BB-UART5-00A0.dtbo' loaded; overlay id #3 [ 2.824537] bone_capemgr bone_capemgr: slot #6: dtbo 'BB-UART4-00A0.dtbo' loaded; overlay id #1 [ 2.824719] bone_capemgr bone_capemgr: slot #5: dtbo 'BB-UART2-00A0.dtbo' loaded; overlay id #2 [ 2.829155] bone_capemgr bone_capemgr: slot #8: dtbo 'BB-ADC-00A0.dtbo' loaded; overlay id #4
I have tried various combinations of BB-UART1, BB-UART2, etc and it works if I just use BB-UART1 and BB-UART2 but as soon as I include BB-UART4 and BB-UART5 I see these messages. Does anyone else have any idea what's going on? Regards, Pak On Wednesday, March 8, 2017 at 12:17:52 AM UTC+11, [email protected] wrote: > > Hello Dominik, > > Did you resolve this issue? I am seeing the same thing at the moment where > the cape_mngr at boot up says it loaded the UARTs and the device appear on > /dev/ttyO* but I am unable to communicate with the attached device. I am > wondering if the fact that I am not seeing a pinmux_uart2_pins in the > pinctrl path has anything to do with it. > > Checking for: /uEnv.txt ... > Checking for: /boot.scr ... > Checking for: /boot/boot.scr ... > Checking for: /boot/uEnv.txt ... > gpio: pin 55 (gpio 55) value is 1 > 1550 bytes read in 29 ms (51.8 KiB/s) > Loaded environment from /boot/uEnv.txt > Using: *dtb=am335x-boneblack-emmc-overlay.dtb* ... > Checking if uname_r is set in /boot/uEnv.txt... > gpio: pin 56 (gpio 56) value is 1 > Running uname_boot ... > loading /boot/vmlinuz-4.4.52 ... > 8686800 bytes read in 504 ms (16.4 MiB/s) > loading /boot/dtbs/4.4.52/am335x-boneblack-emmc-overlay.dtb ... > 54478 bytes read in 160 ms (332 KiB/s) > loading /boot/initrd.img-4.4.52 ... > 4079584 bytes read in 267 ms (14.6 MiB/s) > debug: [root=UUID=0abe7613-556f-4720-918c-57548c139814 ro rootfstype=ext4 > rootwait fixrtc console=ttyS0,115200 coherent_pool=1M > init=/lib/systemd/systemd > bone_capemgr.enable_partno=BB-UART1,BB-UART2,BB-UA. > debug: [bootz 0x82000000 0x88080000:3e3fe0 0x88000000] ... > Kernel image @ 0x82000000 [ 0x000000 - 0x848cd0 ] > ## Flattened Device Tree blob at 88000000 > Booting using the fdt blob at 0x88000000 > Loading Ramdisk to 8fc1c000, end 8fffffe0 ... OK > Loading Device Tree to 8fc0b000, end 8fc1b4cd ... OK > > Starting kernel ... > > [ 0.000000] Kernel command line: > root=UUID=0abe7613-556f-4720-918c-57548c139814 ro rootfstype=ext4 rootwait > fixrtc console=ttyS0,115200 coherent_pool=1M init=/lib/systemd/systemd > bone_capemgr.enable_paC > [ 3.896062] bone_capemgr bone_capemgr: Baseboard: > 'A335BNLT,00C0,3615BBBK0779' > [ 3.896082] bone_capemgr bone_capemgr: > compatible-baseboard=ti,beaglebone-black - #slots=4 > [ 3.936815] bone_capemgr bone_capemgr: slot #0: No cape found > [ 3.980789] bone_capemgr bone_capemgr: slot #1: No cape found > [ 4.024783] bone_capemgr bone_capemgr: slot #2: No cape found > [ 4.068802] bone_capemgr bone_capemgr: slot #3: No cape found > [ 4.074593] bone_capemgr bone_capemgr: enabled_partno PARTNO 'BB-UART1' > VER 'N/A' PR '0' > [ 4.082727] bone_capemgr bone_capemgr: slot #4: override > [ 4.088073] bone_capemgr bone_capemgr: Using override eeprom data at > slot 4 > [ 4.095077] bone_capemgr bone_capemgr: slot #4: 'Override Board > Name,00A0,Override Manuf,BB-UART1' > [ 4.104227] bone_capemgr bone_capemgr: enabled_partno PARTNO 'BB-UART2' > VER 'N/A' PR '0' > [ 4.112366] bone_capemgr bone_capemgr: slot #5: override > [ 4.117708] bone_capemgr bone_capemgr: Using override eeprom data at > slot 5 > [ 4.124709] bone_capemgr bone_capemgr: slot #5: 'Override Board > Name,00A0,Override Manuf,BB-UART2' > [ 4.133814] bone_capemgr bone_capemgr: enabled_partno PARTNO 'BB-UART4' > VER 'N/A' PR '0' > [ 4.141966] bone_capemgr bone_capemgr: slot #6: override > [ 4.147307] bone_capemgr bone_capemgr: Using override eeprom data at > slot 6 > [ 4.154308] bone_capemgr bone_capemgr: slot #6: 'Override Board > Name,00A0,Override Manuf,BB-UART4' > [ 4.163411] bone_capemgr bone_capemgr: enabled_partno PARTNO 'BB-UART5' > VER 'N/A' PR '0' > [ 4.171544] bone_capemgr bone_capemgr: slot #7: override > [ 4.176887] bone_capemgr bone_capemgr: Using override eeprom data at > slot 7 > [ 4.183887] bone_capemgr bone_capemgr: slot #7: 'Override Board > Name,00A0,Override Manuf,BB-UART5' > [ 4.192991] bone_capemgr bone_capemgr: enabled_partno PARTNO 'BB-ADC' > VER 'N/A' PR '0' > [ 4.200952] bone_capemgr bone_capemgr: slot #8: override > [ 4.206295] bone_capemgr bone_capemgr: Using override eeprom data at > slot 8 > [ 4.213296] bone_capemgr bone_capemgr: slot #8: 'Override Board > Name,00A0,Override Manuf,BB-ADC' > [ 4.223033] bone_capemgr bone_capemgr: initialized OK. > [ 4.242000] bone_capemgr bone_capemgr: slot #6: dtbo > 'BB-UART4-00A0.dtbo' loaded; overlay id #2 > [ 4.242202] bone_capemgr bone_capemgr: slot #5: dtbo > 'BB-UART2-00A0.dtbo' loaded; overlay id #1 > [ 4.242327] bone_capemgr bone_capemgr: slot #4: dtbo > 'BB-UART1-00A0.dtbo' loaded; overlay id #0 > [ 4.243478] bone_capemgr bone_capemgr: slot #7: dtbo > 'BB-UART5-00A0.dtbo' loaded; overlay id #3 > [ 4.245060] bone_capemgr bone_capemgr: slot #8: dtbo 'BB-ADC-00A0.dtbo' > loaded; overlay id #4 > > 0 lrwxrwxrwx 1 root root 5 Sep 1 16:10 ttyO0 -> ttyS0 > 0 lrwxrwxrwx 1 root root 5 Sep 1 16:10 ttyO1 -> ttyS1 > 0 lrwxrwxrwx 1 root root 5 Sep 1 16:10 ttyO2 -> ttyS2 > 0 lrwxrwxrwx 1 root root 5 Sep 1 16:10 ttyO4 -> ttyS4 > 0 lrwxrwxrwx 1 root root 5 Sep 1 16:10 ttyO5 -> ttyS5 > > pin 66 (44e10908.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 67 (44e1090c.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 68 (44e10910.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 69 (44e10914.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 70 (44e10918.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 71 (44e1091c.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 72 (44e10920.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 73 (44e10924.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 74 (44e10928.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 75 (44e1092c.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 76 (44e10930.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 77 (44e10934.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 78 (44e10938.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 79 (44e1093c.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 80 (44e10940.0): 4a100000.ethernet (GPIO UNCLAIMED) function > cpsw_default group cpsw_default > pin 81 (44e10944.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 82 (44e10948.0): 4a101000.mdio (GPIO UNCLAIMED) function > davinci_mdio_default group davinci_mdio_default > pin 83 (44e1094c.0): 4a101000.mdio (GPIO UNCLAIMED) function > davinci_mdio_default group davinci_mdio_default > *pin 84 (44e10950.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)* > *pin 85 (44e10954.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)* > pin 86 (44e10958.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 87 (44e1095c.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 88 (44e10960.0): 48060000.mmc (GPIO UNCLAIMED) function > pinmux_mmc1_pins group pinmux_mmc1_pins > pin 89 (44e10964.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 90 (44e10968.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 91 (44e1096c.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 92 (44e10970.0): 44e09000.serial (GPIO UNCLAIMED) function > pinmux_uart0_pins group pinmux_uart0_pins > pin 93 (44e10974.0): 44e09000.serial (GPIO UNCLAIMED) function > pinmux_uart0_pins group pinmux_uart0_pins > pin 94 (44e10978.0): 4819c000.i2c (GPIO UNCLAIMED) function > pinmux_i2c2_pins group pinmux_i2c2_pins > pin 95 (44e1097c.0): 4819c000.i2c (GPIO UNCLAIMED) function > pinmux_i2c2_pins group pinmux_i2c2_pins > pin 96 (44e10980.0): 48022000.serial (GPIO UNCLAIMED) function > pinmux_bb_uart1_pins group pinmux_bb_uart1_pins > pin 97 (44e10984.0): 48022000.serial (GPIO UNCLAIMED) function > pinmux_bb_uart1_pins group pinmux_bb_uart1_pins > pin 98 (44e10988.0): 44e0b000.i2c (GPIO UNCLAIMED) function > pinmux_i2c0_pins group pinmux_i2c0_pins > pin 99 (44e1098c.0): 44e0b000.i2c (GPIO UNCLAIMED) function > pinmux_i2c0_pins group pinmux_i2c0_pins > > > Your help would be much appreciated. > > Regards, > Pak > > > > On Monday, June 13, 2016 at 8:13:53 PM UTC+10, [email protected] > wrote: >> >> Does that mean when I used BB-UART2 and /dev/ttyO2 on 3.8.13 I was >> actually using UART1? >> >> Anyway on 4.1.15 I enabled all UARTs ( >> *cape_enable=bone_capemgr.enable_partno=BB-UART1,BB-UART2,BB-UART3,BB-UART4,BB-UART5*) >> >> in */boot/uEnv.txt* and I tried all tty files (*ttyO1, ttyO2, ttyO3, >> ttyO4, ttyO5*) however I didn't receive anything on any of the tty >> files. Only on ttyO2 - ttyO5 I received exactly 1 byte (that I didn't even >> send) at the very beginning, namely 0x00. >> >> *However with 3.8.13 I enable BB-UART2 and use /dev/ttyO2 and it works >> without problems!* So what's the difference here? >> >> >> (I use pyserial for serial access.) >> >> >> root@beaglebone:~# dmesg | grep serial >> [ 3.492130] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 158, >> base_baud = 3000000) is a 8250 >> [ 3.500724] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 159, >> base_baud = 3000000) is a 8250 >> [ 3.501692] 48024000.serial: ttyS2 at MMIO 0x48024000 (irq = 160, >> base_baud = 3000000) is a 8250 >> [ 4.145889] 481a6000.serial: ttyS3 at MMIO 0x481a6000 (irq = 201, >> base_baud = 3000000) is a 8250 >> [ 4.149061] 481a8000.serial: ttyS4 at MMIO 0x481a8000 (irq = 202, >> base_baud = 3000000) is a 8250 >> [ 4.151370] 481aa000.serial: ttyS5 at MMIO 0x481aa000 (irq = 203, >> base_baud = 3000000) is a 8250 >> [ 16.842799] pinctrl-single 44e10800.pinmux: pin 44e108c0.0 already >> requested by 481aa000.serial; cannot claim for 0-0070 >> >> >> root@beaglebone:~# dmesg | grep bone >> [...] >> [ 3.885891] bone_capemgr bone_capemgr: >> compatible-baseboard=ti,beaglebone-black - #slots=4 >> [ 3.943363] bone_capemgr bone_capemgr: slot #0: No cape found >> [ 4.003334] bone_capemgr bone_capemgr: slot #1: No cape found >> [ 4.063335] bone_capemgr bone_capemgr: slot #2: No cape found >> [ 4.123333] bone_capemgr bone_capemgr: slot #3: No cape found >> [ 4.129143] bone_capemgr bone_capemgr: enabled_partno PARTNO >> 'BB-UART1' VER 'N/A' PR '0' >> [ 4.129165] bone_capemgr bone_capemgr: slot #4: override >> [ 4.129181] bone_capemgr bone_capemgr: Using override eeprom data at >> slot 4 >> [ 4.129197] bone_capemgr bone_capemgr: slot #4: 'Override Board >> Name,00A0,Override Manuf,BB-UART1' >> [ 4.129323] bone_capemgr bone_capemgr: enabled_partno PARTNO >> 'BB-UART2' VER 'N/A' PR '0' >> [ 4.129337] bone_capemgr bone_capemgr: slot #5: override >> [ 4.129349] bone_capemgr bone_capemgr: Using override eeprom data at >> slot 5 >> [ 4.129364] bone_capemgr bone_capemgr: slot #5: 'Override Board >> Name,00A0,Override Manuf,BB-UART2' >> [ 4.129474] bone_capemgr bone_capemgr: enabled_partno PARTNO >> 'BB-UART3' VER 'N/A' PR '0' >> [ 4.129488] bone_capemgr bone_capemgr: slot #6: override >> [ 4.129500] bone_capemgr bone_capemgr: Using override eeprom data at >> slot 6 >> [ 4.129515] bone_capemgr bone_capemgr: slot #6: 'Override Board >> Name,00A0,Override Manuf,BB-UART3' >> [ 4.129628] bone_capemgr bone_capemgr: enabled_partno PARTNO >> 'BB-UART4' VER 'N/A' PR '0' >> [ 4.129641] bone_capemgr bone_capemgr: slot #7: override >> [ 4.129653] bone_capemgr bone_capemgr: Using override eeprom data at >> slot 7 >> [ 4.129668] bone_capemgr bone_capemgr: slot #7: 'Override Board >> Name,00A0,Override Manuf,BB-UART4' >> [ 4.129769] bone_capemgr bone_capemgr: enabled_partno PARTNO >> 'BB-UART5' VER 'N/A' PR '0' >> [ 4.129783] bone_capemgr bone_capemgr: slot #8: override >> [ 4.129795] bone_capemgr bone_capemgr: Using override eeprom data at >> slot 8 >> [ 4.129809] bone_capemgr bone_capemgr: slot #8: 'Override Board >> Name,00A0,Override Manuf,BB-UART5' >> [ 4.130608] bone_capemgr bone_capemgr: initialized OK. >> [ 4.134780] bone_capemgr bone_capemgr: slot #5: dtbo >> 'BB-UART2-00A0.dtbo' loaded; overlay id #1 >> [ 4.145526] bone_capemgr bone_capemgr: slot #4: dtbo >> 'BB-UART1-00A0.dtbo' loaded; overlay id #0 >> [ 4.146611] bone_capemgr bone_capemgr: slot #6: dtbo >> 'BB-UART3-00A0.dtbo' loaded; overlay id #2 >> [ 4.149773] bone_capemgr bone_capemgr: slot #7: dtbo >> 'BB-UART4-00A0.dtbo' loaded; overlay id #3 >> [ 4.151969] bone_capemgr bone_capemgr: slot #8: dtbo >> 'BB-UART5-00A0.dtbo' loaded; overlay id #4 >> [ 17.153124] pinctrl-single 44e10800.pinmux: could not request pin 48 >> (44e108c0.0) from group nxp_hdmi_bonelt_pins on device pinctrl-single >> [...] >> >> On Friday, June 10, 2016 at 10:11:28 PM UTC+2, [email protected] >> wrote: >>> >>> >>> Hello, >>> >>> I have an application that uses UART2. It runs fine under Debian 7 >>> ("Wheezy") however it doesn't under Debian 8 ("Jessie", kernel: >>> 4.1.15-ti-rt-r43); nothing arrives at the corresponding tty file >>> (/dev/ttyO2). >>> For enabling UARTs I declared >>> >>> cape_enable=capemgr.enable_partno=BB-UART2 (Debian 7) >>> >>> cape_enable=bone_capemgr.enable_partno=BB-UART2 (Debian 8) >>> >>> in */boot/uEnv.txt*. >>> >>> (Note that when I use UART4 instead of UART2 my application runs fine >>> under both operating systems.) >>> >>> So I tried to figure out the changes from Debian 7 to Debian 8 by >>> looking at the dts files. Looking at *cape-universal-00A0.dts* revealed: >>> >>> *Debian 7:* >>> >>> /************************/ >>> /* UARTs */ >>> /************************/ >>> >>> fragment@10 { >>> target = <&uart2>; /* really uart1 */ >>> __overlay__ { >>> status = "okay"; >>> pinctrl-names = "default"; >>> pinctrl-0 = <>; >>> }; >>> }; >>> >>> fragment@11 { >>> target = <&uart3>; /* really uart2 */ >>> __overlay__ { >>> status = "okay"; >>> pinctrl-names = "default"; >>> pinctrl-0 = <>; >>> }; >>> }; >>> >>> >>> >>> *Debian 8 (/opt/source/bb.org-overlays/src/arm/cape-universal-00A0.dts):* >>> >>> /************************/ >>> /* UARTs */ >>> /************************/ >>> >>> fragment@10 { >>> target = <&uart2>; /* really uart1 */ >>> __overlay__ { >>> status = "okay"; >>> pinctrl-names = "default"; >>> pinctrl-0 = <>; >>> }; >>> }; >>> >>> fragment@11 { >>> target = <&uart3>; /* really uart2 */ >>> __overlay__ { >>> status = "okay"; >>> pinctrl-names = "default"; >>> pinctrl-0 = <>; >>> }; >>> }; >>> >>> *Debian 8 (/opt/source/bb.org-overlays/src/arm/cape-universal-00A0.dts):* >>> >>> /************************/ >>> /* UARTs */ >>> /************************/ >>> >>> fragment@10 { >>> target = <&uart1>; >>> __overlay__ { >>> status = "okay"; >>> pinctrl-names = "default"; >>> pinctrl-0 = <>; >>> }; >>> }; >>> >>> fragment@11 { >>> target = <&uart2>; >>> __overlay__ { >>> status = "okay"; >>> pinctrl-names = "default"; >>> pinctrl-0 = <>; >>> }; >>> }; >>> >>> I don't know what this exactly means, especially the "really uart<x>". >>> Can anyone clarify here? Also there are two different >>> *cape-universal-00A0.dts >>> *files under Debian 8, which one is relevant? I see that in >>> */boot/uEnv.txt* the following line is enabled by default: >>> *cmdline=coherent_pool=1M >>> quiet cape_universal=enable*. Which dts (dtb) file does it refer to? >>> >>> Comparing */opt/source/bb.org-overlays/src/arm/BB-UART4-00A0.dts* and >>> */opt/source/bb.org-overlays/src/arm/BB-UART2-00A0.dts* under Debian 8 >>> revealed that apparently both pins have a different multiplexer mode (uart2 >>> -> MUX_MODE1, uart4 -> MUX_MODE6). Does this have any effect? I couldn't >>> find an equivalent dts file for Debian 7. >>> Probably related: from *cape-universal-00A0.dts* I see >>> >>> *UART2 (P9_21, P9_22):* >>> >>> [...] >>> P9_21_uart_pin: pinmux_P9_21_uart_pin { >>> pinctrl-single,pins = <0x154 0x31>; }; /* Mode 1, >>> Pull-Up, RxActive */ >>> >>> [...] >>> P9_22_uart_pin: pinmux_P9_22_uart_pin { >>> pinctrl-single,pins = <0x150 0x31>; }; /* Mode 1, >>> Pull-Up, RxActive */ >>> >>> *UART4 (P9_11, P9_13):* >>> >>> [...] >>> P9_11_uart_pin: pinmux_P9_11_uart_pin { >>> pinctrl-single,pins = <0x070 0x36>; }; /* Mode 6, >>> Pull-Up, RxActive */ >>> >>> [...] >>> P9_13_uart_pin: pinmux_P9_13_uart_pin { >>> pinctrl-single,pins = <0x074 0x36>; }; /* Mode 6, >>> Pull-Up, RxActive */ >>> >>> Is this relevant / exhibiting different behavior? >>> >>> I also realized that for UART2 there is an additional dts file under >>> Debian 8: */opt/source/bb.org-overlays/src/arm/BB-UART2-RTSCTS-00A0.dts* >>> For UART4 there is no equivalent. How is this related? >>> >>> The pin multiplexing declarations in *cape-universal-00A0.dts >>> *(P9_21_pinmux, >>> P9_22_pinmux) seem to remain the same when going from Debian 7 to Debian 8. >>> >>> So does anyone know the reason why UART2 behaves differently on Debian 8 >>> (compared to Debian 7)? >>> >>> Many thanks in advance! Cheers, >>> >>> Dominik >>> >> -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/1a54360f-7e07-4288-89c3-df0841ed4093%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
