There is a peripheral called the GPMC -- general purpose memory controller -- 
which is pretty good at SRAM-style interfaces. 

> On Jun 30, 2017, at 7:46 AM, Gerald Coley <[email protected]> wrote:
> 
> It is feasible.
>  
> Gerald
>  
> From: [email protected] [mailto:[email protected]] On 
> Behalf Of sajeevan k
> Sent: Thursday, June 29, 2017 11:48 PM
> To: BeagleBoard <[email protected]>
> Subject: [beagleboard] Re: DPRAM interface with BBB
>  
> Hi all,
> 
> Any comments about the feasibility of DPRAM interface with BeagleBone Black 
> will be highly appreciated? Please...
> 
> 
> Thanks & Regards,
> Sajeevan.K
> 
> On Tuesday, June 27, 2017 at 1:59:51 PM UTC+5:30, sajeevan k wrote:
> Hi all,
>  
> Is it possible to interface an Asynchronous DPRAM (with 16 address lines and 
> 16 data lines) with BBB?
>  
> Is there any block diagram (circuit diagram), which shows the connections, 
> available?
>  
> Can we use GPMC_ADO-GPMC-AD15 pins as Address and Data mux pins with 
> GPMC_ADVN_ALE?
>  
> Also I think GPMC_Ax pins are not required, since we can use Address-Data 
> multiplexing with ALE signal.
>  
> I think all the required pins are coming out in P8 connector.
> 1) GPMC_ADO-GPMC-AD15
> 2) GPMC_ADVN_ALE
> 3) GPMC_WEN
> 4) GPMC_OEN_REN
> 5) GPMC_BE1N
> 6) GPMC_CSN0
>  
> But GMC_AD0-GPMC-AD7 are also connected to MMC1_D0 to MMC1_D7. Will this 
> cause any problem to the functoining of DPRAM? Or will the DPRAM functioning 
> cause any problem to MMC1.
>  
> Have anybody interfaced DPRAM with BBB? Please share your experience.
>  
> Thanks and Regards,
> Sajeevan.K
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