I am trying to get p8_45 and p8_49 to run PWM2A and PWM2B signals. I am running 4.14.3-ti-r14 with enable_uboot_overlays=1 enable_uboot_cape_universal=1 disable_uboot_overlay_video=1
According to the SRM that is possible, When I do an export to echo 1 > /sys/class/pwm/pwmchip6/export , I only get /sys/clas/pwm/pwm-6:1 With echo 1 > /sys/class/pwm/pwmchip3/export , I get /sys/clas/pwm/pwm-3:0 and /sys/clas/pwm/pwm-3:1. Why is that? Should I do anything else? On Friday, September 29, 2017 at 11:18:26 PM UTC+2, RobertCNelson wrote: > > On Fri, Sep 29, 2017 at 3:19 PM, William Hermans <yyr...@gmail.com > <javascript:>> wrote: > > Robert, > > > > Ok I think I see what you mean now( fully ). With universal IO and the > > generic startup script enabled. I did see something similar to what you > were > > saying. However, if one disables both universal IO, and the generic > startup > > script, then writes their own custom overlay for all 3 of the PWM chips > that > > are dual channel. You get a structure like this: > > > > root@wgd:~# ls /sys/class/pwm/pwmchip*/ |grep pwm > > /sys/class/pwm/pwmchip0/: > > npwm > > /sys/class/pwm/pwmchip2/: > > npwm > > /sys/class/pwm/pwmchip4/: > > npwm > > > > This is consistent across multiple images on the same board. In this > case a > > 4G beaglebone black( rev C ). But at the same time as you can see from > the > > output above. The two PWM channels for each PWM chip are not enabled. In > > Jessie, these are populated automatically at boot. How can I make that > > happen in stretch ? I could write a script, but I think that is done > > automatically through cape_manager in Jessie ? > > What's happening in v4.4.x, the pwm's are now in the correct order, if > you look at v4.4.x: (pwm came before ecap) > > #4.4.88-ti-r129 > pwmchip0 -> > ../../devices/platform/ocp/48300000.epwmss/48300200.pwm/pwm/pwmchip0 > pwmchip2 -> > ../../devices/platform/ocp/48302000.epwmss/48302200.pwm/pwm/pwmchip2 > pwmchip4 -> > ../../devices/platform/ocp/48304000.epwmss/48304200.pwm/pwm/pwmchip4 > pwmchip6 -> > ../../devices/platform/ocp/48300000.epwmss/48300100.ecap/pwm/pwmchip6 > pwmchip7 -> > ../../devices/platform/ocp/48304000.epwmss/48304100.ecap/pwm/pwmchip7 > > In v4.9.x: (since ecap are considered pwm's) they are now in the order > of the register address: > > pwmchip0 -> > ../../devices/platform/ocp/48300000.epwmss/48300100.ecap/pwm/pwmchip0 > pwmchip1 -> > ../../devices/platform/ocp/48300000.epwmss/48300200.pwm/pwm/pwmchip1 > pwmchip3 -> > ../../devices/platform/ocp/48302000.epwmss/48302200.pwm/pwm/pwmchip3 > pwmchip5 -> > ../../devices/platform/ocp/48304000.epwmss/48304100.ecap/pwm/pwmchip5 > pwmchip6 -> > ../../devices/platform/ocp/48304000.epwmss/48304200.pwm/pwm/pwmchip6 > > In your case, you only want the dual mode "pwm", (48300200.pwm, > 48302200.pwm, 48304200.pwm), you shouldn't blindly enable the > "pwmchip0,2,4" as they are dynamic. You should grep the symlink > first. > > Ps, watch out for v4.11.x too: > > #v4.4.x/v4.9.x > /sys/class/pwm/pwmchip1/: > drwxr-xr-x 3 root root 0 Sep 29 21:06 pwm0 > drwxr-xr-x 3 root root 0 Sep 29 21:06 pwm1 > > #v4.11.x+ > > /sys/class/pwm/pwmchip1/: > drwxrwxr-x 3 root pwm 0 Sep 29 21:10 pwm-1:0 > drwxrwxr-x 3 root pwm 0 Sep 29 21:10 pwm-1:1 > > (ps, this last change is good thing, notice that udev correctly added > the "root:pwm" rule.. ;) ) > > Regards, > > -- > Robert Nelson > https://rcn-ee.com/ > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/f352bae1-24f1-4172-9136-259ef870ee63%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
