Have a look at the BeagleLogic project: they use one PRU for data acquisition and the other one to write to a portion of DDR allocated through a kernel driver: https://github.com/abhishek-kakkar/BeagleLogic/blob/master/firmware/beaglelogic-pru0.c
On Monday, January 22, 2018 at 3:29:36 PM UTC, David Edwards wrote: > > I'm looking at moving away from an FPGA to a PocketBeagle for a new > project, and I think I can divide up my real-time tasks between the 2 PRU's: > > 1. Use PRU0 as a SPI master to capture external 16-bit ADC data at > 500kS/s > 2. Store around 30MB of samples in DDR > 3. Change PRU0 firmware to be a SPI slave to transfer these samples to > an external host with a SPI clock rate in the neighborhood of 40MHz > (~2.5MB/s) > 4. PRU1 will act as an I2C slave handling stop/start/config requests > for the two PRU0 activities. > > I'm a little concerned about the DDR transfer in step 3 keeping up with > the SPI clock rate. Will this transfer be subject to possible latencies in > the non-RTOS core? Or, is there a way to architect this where PRU0 has > direct access to the 512MB external memory? The linux core does not > necessarily need to see or even know about this data, I simply need to > store it and then dump it back out. > > > Thanks, > > Dave > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/d80d896e-6b35-43a7-996b-ea1130866d83%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
