Hi friends. Im trying to use the BBB built-in ADC to read values with regular sampling frequency. I am using almost all defined by Rafael Vega's github project page (https://github.com/rvega/bbb-pru/blob/master/apps/adc/pru.c). I already made changes to read the ADC sampled values on the ARM program and everithing are working fine. BUT i have 2 questions about this program:
1) I want to know how he knows the necessaries BBB registers to configurate the ADC and the communication pipe between ADC and PRUs on this setup? I already looked the PRUSS and SITARA doccumentation but with no match the registers names used by him. 2) how i can calculate the sampling frequency? I found on his page that it was configured to 50 ksps but, trying to calculate this sampling frequency on the gived formula: // fs = 24MHz / (CLK_DIV*2*Channels*(OpenDly+Average*(14+SampleDly))) (on line 108 from the link above) I didn't get an integer fs value, for example, using their specified values (clock_divider = 4; open_delay = 4; average = 1; sample_delay = 4; and channel = 6) i get 22727.2727273 Hz.. Am i missing something? Thanks for all.. -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/432ef525-8267-4b80-bdc4-664bec06fb11%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
