On 2/18/2019 9:21 PM, brucejs...@gmail.com wrote: > It's unclear to me so far why so many I/O pins are shared, creating > exclusions, yet so many other I/O pins are left as simple GPIO. I mean, > can't we have both two I2C and 2 SPI at the same time, all on different > pins ?
Use the I2C1 pins on P9.24 and P9.26 and you won't conflict with any SPI pins. Load the universal cape and use config-pin to set the pins to i2c mode. The core chip on the BBB (and just about _every_ non-trivial SoC) has a lot of pin multiplexing to enable more features. The BBB suffers slightly in addition due to the fact that not all pins are available on the P8/P9 headers, further limiting options. A good reference for the pin multiplexing is this spreadsheet (forked from selsinork, I added details on pin usage for various CNC capes): https://github.com/cdsteinkuehler/beaglebone-black-pinmux/blob/hal_pru_generic/pinmux.ods ...and of course the AM335x data-sheet and TRM from TI. It can be frustrating trying to work through the various pin multiplexing options, but it would be a *LOT* more frustrating not having _any_ pinmux options! :) -- Charles Steinkuehler char...@steinkuehler.net -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/f08ea9a4-5597-a5b3-6673-58047153c33a%40steinkuehler.net. For more options, visit https://groups.google.com/d/optout.
