I said:

AFAIR the PRU cannot write to PWMSS-0 SS when the tbclk isn't enabled.
>

That's wrong, sorry.
 
Am Samstag, 6. Juli 2019 02:24:02 UTC+2 schrieb Super Duper88:
>
> I had also the idea to enable clock for PWMSS2 via enabling control module 
> bit.
> But writing to "pwmss_ctrl Register" 0x44E10664 didn't change behaviour.
>

How do you write? The PRU has no write access to that adress (just fails, 
no message). It needs the ARM in supervisor mode (kernel module).
 

>
> Maybe I have to write also to "CM_PER_EPWMSS2_CLKCTRL Register" at 
> 0x44E000D8?
>

Sure, this reg must contain the value 2. The PRU can write.

Regards

PS: You could use the loadable kernel module from libpruio to fix this 
issue. First, it enables all PWM module clocks [0-2] (like in 3.8 kernel). 
And later you can adapt the setting via sysfs (to synchonize PWM modules). 
Just install the libpruio-lkm package from Arends PPA. Find details at

http://users.freebasic-portal.de/tjf/Projekte/libpruio/doc/html/ChaPreparation.html#SecDebPac

-- 
For more options, visit http://beagleboard.org/discuss
--- 
You received this message because you are subscribed to the Google Groups 
"BeagleBoard" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to [email protected].
To view this discussion on the web visit 
https://groups.google.com/d/msgid/beagleboard/18b83539-f70a-457a-b54b-2d85a3f0f6d8%40googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

Reply via email to